ESDALC6-4N4 STMicroelectronics, ESDALC6-4N4 Datasheet - Page 8

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ESDALC6-4N4

Manufacturer Part Number
ESDALC6-4N4
Description
TVS Diode Arrays 7V 9.5pF ESD Array 70nA 4-Lines 6V
Manufacturer
STMicroelectronics
Series
ESDr
Datasheet

Specifications of ESDALC6-4N4

Rohs
yes
Polarity
Unidirectional
Channels
4 Channels
Breakdown Voltage
6 V
Clamping Voltage
10 V
Peak Surge Current
2.3 A
Mounting Style
SMD/SMT
Termination Style
SMD/SMT
Minimum Operating Temperature
+ 25 C
Maximum Operating Temperature
+ 25 C
Capacitance
9.5 pF
Case Height
0.38 mm
Package / Case
uQFN-4L
Peak Pulse Power Dissipation
27 W
Recommendation on PCB assembly
4
4.1
4.2
4.3
8/11
Recommendation on PCB assembly
Stencil opening design
Reference design
Figure 17. Recommended stencil window position
Solder paste
1.
2.
3.
4.
Placement
1.
2.
3.
Stencil opening thickness: 100 µm
Stencil opening for leads: Opening to footprint ratio is 100%.
Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
“No clean” solder paste is recommended.
Offers a high tack force to resist component movement during high speed.
Solder paste with fine particles: powder particle size is 20-45 µm.
Manual positioning is not recommended.
It is recommended to use the lead recognition capabilities of the placement system, not
the outline centering.
Standard tolerance of ± 0.05 mm is recommended.
180 µm
Doc ID 022191 Rev 2
580 µm
T=100 µm and opening
ratio is 100%
Footprint
Footprint
Stencil window
ESDALC6-4N4

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