W25X40BVSSIG Winbond Electronics, W25X40BVSSIG Datasheet - Page 27

IC SPI FLASH 4MBIT 8SOIC

W25X40BVSSIG

Manufacturer Part Number
W25X40BVSSIG
Description
IC SPI FLASH 4MBIT 8SOIC
Manufacturer
Winbond Electronics
Datasheet

Specifications of W25X40BVSSIG

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
4M (512K x 8)
Speed
104MHz
Interface
SPI Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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W25X10BV/20BV/40BV
9.2.15
32KB Block Erase (52h)
The Block Erase instruction sets all memory within a specified block (32K-bytes) to the erased state of
all 1s (FFh). A Write Enable instruction must be executed before the device will accept the Block
Erase Instruction (Status Register bit WEL must equal 1). The instruction is initiated by driving the /CS
pin low and shifting the instruction code “52h” followed a 24-bit block address (A23-A0) (see Figure 2).
The Block Erase instruction sequence is shown in figure 15.
The /CS pin must be driven high after the eighth bit of the last byte has been latched. If this is not
done the Block Erase instruction will not be executed. After /CS is driven high, the self-timed Block
Erase instruction will commence for a time duration of t
1 (See AC Characteristics). While the Block
BE
Erase cycle is in progress, the Read Status Register instruction may still be accessed for checking the
status of the BUSY bit. The BUSY bit is a 1 during the Block Erase cycle and becomes a 0 when the
cycle is finished and the device is ready to accept other instructions again. After the Block Erase cycle
has finished the Write Enable Latch (WEL) bit in the Status Register is cleared to 0. The Block Erase
instruction will not be executed if the addressed page is protected by the Block Protect (SEC, TB,
BP2, BP1, and BP0) bits (see Status Register Memory Protection table).
Figure 15. 32KB Block Erase Instruction Sequence Diagram
Publication Release Date: August 20, 2009
- 27 -
Preliminary -- Revision B

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