CY7C144-55JC Cypress Semiconductor Corp, CY7C144-55JC Datasheet - Page 3
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CY7C144-55JC
Manufacturer Part Number
CY7C144-55JC
Description
IC SRAM 64KB DUAL 68-PLCC
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C144-55JC.pdf
(20 pages)
Specifications of CY7C144-55JC
Format - Memory
RAM
Memory Type
SRAM - Dual Port, Asynchronous
Memory Size
64K (8K x 8)
Speed
55ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C144-55JC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY7C144-55JC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Table 1. Selection Guide
Table 2. Pin Definitions
Document #: 38-06034 Rev. *F
Maximum Access Time
Maximum Operating Current
Maximum Standby Current for I
I/O
A
CE
OE
R/W
SEM
INT
BUSY
M/S
V
GND
Left Port
0L12L
CC
0L7L(8L)
L
L
L
L
L
L
I/O
A
CE
OE
R/W
SEM
INT
BUSY
Description
Right Port
0R12R
0R7R(8R)
R
R
R
R
R
R
Data bus Input/Output
Address Lines
Chip Enable
Output Enable
Read/Write Enable
Semaphore Enable. When asserted LOW, allows access to eight semaphores. The three least significant
bits of the address lines will determine which semaphore to write or read. The I/O
to a semaphore. Semaphores are requested by writing a 0 into the respective location.
Interrupt Flag. INT
1FFE. INT
Busy Flag
Master or Slave Select
Power
Ground
SB1
R
is set when left port writes location 1FFF and is cleared when right port reads location 1FFF.
7C144-15
7C145-15
L
is set when right port writes location 1FFE and is cleared when left port reads location
220
15
60
7C144-25
7C145-25
180
25
40
Description
7C144-35
7C145-35
160
35
30
CY7C144, CY7C145
7C144-55
7C145-55
0
pin is used when writing
160
55
30
Page 3 of 20
Unit
mA
mA
ns
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