IDT70914S20PF IDT, Integrated Device Technology Inc, IDT70914S20PF Datasheet - Page 9

IC SRAM 36KBIT 20NS 80TQFP

IDT70914S20PF

Manufacturer Part Number
IDT70914S20PF
Description
IC SRAM 36KBIT 20NS 80TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Datasheets

Specifications of IDT70914S20PF

Format - Memory
RAM
Memory Type
SRAM - Dual Port, Synchronous
Memory Size
36K (4K x 9)
Speed
20ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
80-TQFP, 80-VQFP
Density
36Kb
Access Time (max)
20ns
Sync/async
Synchronous
Architecture
SDR
Clock Freq (max)
50MHz
Operating Supply Voltage (typ)
5V
Address Bus
12b
Package Type
TQFP
Operating Temp Range
0C to 70C
Number Of Ports
2
Supply Current
290mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
80
Word Size
9b
Number Of Words
4K
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
70914S20PF
800-1370

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT70914S20PF
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT70914S20PF8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Timing Waveform of Read-to-Write Cycle No. 1
Timing Waveform of Read-to-Write Cycle No. 2
NOTES:
1. For t
2. OE LOW throughout.
3. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2).
4. For t
IDT70914S
High-Speed 36K (4K x 9) Synchronous Dual-Port Static RAM
be repeated on the second write clock rising edge. If CE = V
be repeated.
ADDRESS
ADDRESS
DATA
DATA
CYC
CYC
CLKEN
DATA
CLKEN
DATA
> min.; OE may be used to avoid data out coincident with the rising edge of the subsequent write clock. Use of OE will eliminate the need for the write to
= min.; data out coincident with the rising edge of the subsequent write clock can occur. To ensure writing to the correct address location, the write must
CLK
R/W
CLK
R/W
OUT
OUT
CE
OE
CE
IN
IN
An
An
t
CKLZ
t
t
CH
CKLZ
(3)
(3)
t
t
CD
CD
t
t
CH
CYC
t
t
CL
OHZ
An + 1
(1)
IL
, invalid data will be written into array. The An+1 must be rewritten on the following cycle.
t
CYC
Qn
Qn
(4)
t
CH
6.42
9
t
CKHZ
t
CL
t
CYC
(3)
Military, Industrial and Commercial Temperature Ranges
t
CL
An + 1
Dn + 1
An + 1
Dn + 1
t
t
S
S
(1)
(1)
(1,2)
(4)
t
(t
H
t
H
(t
CYC
CYC
> min.)
= min.)
An + 2
Dn + 2
3490 drw 10
3490 drw 11

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