CY7C037-15AC Cypress Semiconductor Corp, CY7C037-15AC Datasheet - Page 2

• Manufacturer Part Number: CY7C037-15AC
• Description: IC SRAM 576KBIT 15NS 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C037-15AC

• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Asynchronous
• Memory Size: 576K (32K x 18)
• Speed: 15ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1168

Functional Description
The CY7C027/028 and CY7C037/038 are low-power CMOS
32K, 64K x 16/18 dual-port static RAMs. Various arbitration
schemes are included on the devices to handle situations
when multiple processors access the same piece of data. Two
ports are provided, permitting independent, asynchronous ac-
cess for reads and writes to any location in memory. The de-
vices can be utilized as standalone 16/18-bit dual-port static
RAMs or multiple devices can be combined in order to function
as a 32/36-bit or wider master/slave dual-port static RAM. An
M/S pin is provided for implementing 32/36-bit or wider mem-
ory applications without the need for separate master and
slave devices or additional discrete logic. Application areas
include interprocessor/multiprocessor designs, communica-
tions status buffering, and dual-port video/graphics memory.
Pin Configurations
Note:
Document #: 38-06042 Rev. *A
6.
This pin is NC for CY7C027.
[6]
I/O15L
I/O14L
I/O13L
I/O12L
I/O11L
I/O10L
SEML
A15L
CE0L
CE1L
R/WL
A10L
A11L
A12L
A13L
A14L
GND
GND
VCC
OEL
UBL
A9L
LBL
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
100
26
99
27
98
28
97
29
96
30
95
31
94
32
CY7C028 (64K x 16)
CY7C027 (32K x 16)
93
33
100-Pin TQFP (Top View)
92 91 90
34 35 36
89
37
88
38
87 86
39 40
Each port has independent control pins: dual chip enables
(CE
(OE). Two flags are provided on each port (BUSY and INT). BUSY
signals that the port is trying to access the same location currently
being accessed by the other port. The interrupt flag (INT) permits
communication between ports or systems by means of a mail box.
The semaphores are used to pass a flag, or token, from one port to
the other to indicate that a shared resource is in use. The semaphore
logic is comprised of eight shared latches. Only one side can control
the latch (semaphore) at any time. Control of a semaphore indicates
that a shared resource is in use. An automatic power-down feature is
controlled independently on each port by the chip enable pins.
The CY7C027/028 and CY7C037/038 are available in 100-pin
Thin Quad Plastic Flatpack (TQFP) packages.
0
85
41
and CE
84
42
83 82 81
43 44 45
1
), read or write enable (R/W), and output enable
80
46
79
47
78 77
48 49
76
50
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
CY7C027/028
CY7C037/038
A9R
A10R
A11R
A12R
A13R
A14R
A15R
NC
NC
LBR
UBR
CE0R
CE1R
SEMR
GND
R/WR
OER
GND
GND
I/O15R
I/O14R
I/O13R
I/O12R
I/O11R
I/O10R
[6]
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