93LC76BT-I/SN Microchip Technology, 93LC76BT-I/SN Datasheet - Page 9
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93LC76BT-I/SN
Manufacturer Part Number
93LC76BT-I/SN
Description
IC EEPROM 8KBIT 2MHZ 8SOIC
Manufacturer
Microchip Technology
Datasheet
1.93C76AT-IOT.pdf
(28 pages)
Specifications of 93LC76BT-I/SN
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
8K (512 x 16)
Speed
2MHz
Interface
Microwire, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
2.9
The Write All (WRAL) instruction will write the entire
memory array with the data specified in the command.
The self-timed auto-erase and programming cycle is
initiated by the rising edge of CLK on the last data bit.
Clocking of the CLK pin is not necessary after the
device has entered the WRAL cycle. The WRAL
command includes an automatic ERAL cycle for the
device, so the WRAL instruction does not require an
ERAL instruction. However, the chip must be in the
EWEN status.
FIGURE 2-7:
© 2008 Microchip Technology Inc.
CLK
DO
CS
DI
Write All (WRAL)
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C
1
High-Z
WRAL TIMING
0
0
0
1
x
•••
x
The DO pin indicates the Ready/
device if CS is brought high after a minimum of 250 ns
low (T
V
Dx
CC
Note:
Note:
must be ≥4.5V for proper operation of WRAL.
CSL
•••
).
D0
The write sequence requires a logic high
signal on the PE pin prior to the rising
edge of the last data bit.
After the Write All cycle is complete,
issuing a Start bit and then taking CS low
will clear the Ready/
T
CSL
T
WL
Busy
T
SV
Ready
Busy
Busy
H
status from DO.
DS21796K-page 9
IGH
T
-Z
status of the
CZ