24LC32AT-I/ST Microchip Technology, 24LC32AT-I/ST Datasheet - Page 5
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24LC32AT-I/ST
Manufacturer Part Number
24LC32AT-I/ST
Description
IC EEPROM 32KBIT 400KHZ 8TSSOP
Manufacturer
Microchip Technology
Datasheet
1.24LC32AT-IOT.pdf
(42 pages)
Specifications of 24LC32AT-I/ST
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
32K (4K x 8)
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
24LC32AT-I/STG
24LC32AT-I/STG
24LC32ATI/ST
24LC32AT-I/STG
24LC32ATI/ST
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
24LC32AT-I/ST
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
24LC32AT-I/ST
Manufacturer:
Microchip
Quantity:
5 436
Company:
Part Number:
24LC32AT-I/STG
Manufacturer:
E-CMOS
Quantity:
2 880
2.0
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
2.1
The A0, A1 and A2 inputs are used by the 24XX32A for
multiple device operation. The levels on these inputs
are compared with the corresponding bits in the slave
address. The chip is selected if the comparison is true.
Up to eight devices may be connected to the same bus
by using different Chip Select bit combinations. These
inputs must be connected to either V
In most applications, the chip address inputs A0, A1
and A2 are hard-wired to logic ‘0’ or logic ‘1’. For
applications in which these pins are controlled by a
microcontroller or other programmable device, the chip
address pins must be driven to logic ‘0’ or logic ‘1’
before normal device operation can proceed. Address
pins are not available in the SOT-23 and chip scale
packages.
2.2
SDA is a bidirectional pin used to transfer addresses
and data into and out of the device. It is an open-drain
terminal, therefore, the SDA bus requires a pull-up
resistor to V
400 kHz)
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating Start and Stop conditions.
2010 Microchip Technology Inc.
Name PDIP SOIC SOIJ TSSOP
SDA
SCL
V
V
WP
A0
A1
A2
Note 1: The exposed pad on the DFN/TDFN packages can be connected to V
CC
SS
PIN DESCRIPTIONS
A0, A1, A2 Chip Address Inputs
Serial Data (SDA)
1
2
3
4
5
6
7
8
CC
(typical 10 k for 100 kHz, 2 k for
1
2
3
4
5
6
7
8
PIN FUNCTION TABLE
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
CC
Rotated
TSSOP
or V
6
7
8
1
2
3
4
5
SS
.
DFN
1
2
3
4
5
6
7
8
(1)
TDFN
1
2
3
4
5
6
7
8
2.3
The SCL input is used to synchronize the data transfer
to and from the device.
2.4
This pin must be connected to either V
to V
write operations are inhibited but read operations are
not affected.
(1)
SS
MSOP SOT-23 CS
24AA32A/24LC32A
, write operations are enabled. If tied to V
1
2
3
4
5
6
7
8
Serial Clock (SCL)
Write-Protect (WP)
—
—
—
2
3
1
5
4
SS
or left floating.
—
—
—
2
5
4
3
1
Chip Address Input
Chip Address Input
Chip Address Input
Ground
Serial Address/Data I/O
Serial Clock
Write-Protect Input
+1.7V to 5.5V Power Supply
Description
SS
DS21713L-page 5
or V
CC
. If tied
CC
,