AT88SC153-10SU-00 Atmel, AT88SC153-10SU-00 Datasheet - Page 7

IC EEPROM 2KBIT 1MHZ 8SOIC

AT88SC153-10SU-00

Manufacturer Part Number
AT88SC153-10SU-00
Description
IC EEPROM 2KBIT 1MHZ 8SOIC
Manufacturer
Atmel
Series
CryptoMemory®r
Datasheet

Specifications of AT88SC153-10SU-00

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
2K (256 x 8)
Speed
1MHz
Interface
Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT88SC153-10SU-00
Manufacturer:
ATMEL
Quantity:
310
Part Number:
AT88SC153-10SU-00
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
6.7
6.8
6.9
6.10
6.11
6.12
1016E–SMEM–12/07
Identification Number (Nc)
Cryptogram (Ci)
Secret Seed (Gc)
Memory Test Zone
Password Set
Device Configuration Register
Write Lock Mode (WLM): If enabled (WLM = “0”), the 8 bits of the first byte of each user zone
page will define the locked/unlocked status for each byte in the page. Write access is forbidden
to a byte if its associated bit in byte 0 is set to “0”. Bit 7 controls byte 7, bit 6 controls byte 6, etc.
Modify Forbidden (MDF): If enabled (MDF = “0”), no write access is allowed in the zone at any
time. The user zone must be written before the PER is blown.
Program Only (PGO): If enabled (PGO = “0”), data within the zone may be changed from “1” to
“0” but never from “0” to “1”.
An identification number with up to 56 bits is defined by the issuer and should be unique for each
device.
The 56-bit cryptogram is generated by the internal random generator and modified after each
successful verification of the cryptogram by the chip, on host request. The initial value, defined
by the issuer, is diversified as a function of the identification number. The 64 bits used in the
authentication protocol consist of the 56-bit cryptogram and the 8-bit Authentication Attempts
Counter (AAC). Note that any change in the AAC status will change Ci for the next authentica-
tion attempt.
The 64-bit secret seed, defined by the issuer, is diversified as a function of the identification
number.
The memory test zone is an 8-bit free access zone for memory and protocol test.
The password set consists of two sets of two 24-bit passwords for read and write operations,
defined by the issuer. The write password allows modification of the read and write passwords of
the same set. By default, Password 1 is selected for all user zones.
Secure Code: The secure code is a 24-bit password defined by Atmel and is different for each
card manufacturer. The Write 1 Password is used as the secure code until the personalization is
over (PER = 0).
Attempts Counters: There are four 8-bit password attempts counters (PACs), one for each
password, and one other 8-bit attempts counter for the authentication protocol (AAC). The
attempts counters limit the number of consecutive incorrect code presentations allowed (cur-
rently four).
This 8-bit register allows the issuer to select the device configuration options (active-low) shown
in
Figure
.
7

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