ADP1048DC1-EVALZ Analog Devices, ADP1048DC1-EVALZ Datasheet - Page 48

• Manufacturer Part Number: ADP1048DC1-EVALZ
• Description: Daughter Cards & OEM Boards ADP1048 DAUGHTERCARD
• Manufacturer: Analog Devices
• Series: ADP1048r

Specifications of ADP1048DC1-EVALZ

• Rohs: yes
• Product: Daughter Cards
• Description/function: 100 kHz daughter board
• Dimensions: 40 mm x 25 mm
• Interface Type: I2C
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3.3 V
• Factory Pack Quantity: 1
• For Use With: ADP1048

ADP1047/ADP1048
Bits
[5:3]
[2:0]
VOUT_OV_WARN_LIMIT REGISTER
This register sets the accurate overvoltage threshold measured at the PFC output that causes an overvoltage warning condition.
Table 29. Register 0x42—VOUT_OV_WARN_LIMIT
Bits
[15:11]
[10:8]
[7:0]
VOUT_UV_WARN_LIMIT REGISTER
This register sets the undervoltage threshold measured at the PFC output that causes an undervoltage warning condition.
Table 30. Register 0x43—VOUT_UV_WARN_LIMIT
Bits
[15:11]
[10:8]
[7:0]
VOUT_UV_FAULT_LIMIT REGISTER
This register sets the undervoltage threshold measured at the PFC output that causes an undervoltage fault condition.
Table 31. Register 0x44—VOUT_UV_FAULT_LIMIT
Bits
[15:11]
[10:8]
[7:0]
Bit Name
Retry setting
Delay times
Bit Name
Exponent
High bits
Low byte
Bit Name
Exponent
High bits
Low byte
Bit Name
Exponent
High bits
Low byte
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R
R/W
R/W
R/W
R
R/W
R/W
Description
Return the exponent (N) used in VOUT linear mode format (X = Y × 2
the VOUT_MODE register (Register 0x20, Bits[2:0]). The exponent is in twos complement format.
Mantissa high bits (Y[10:8]) used in VOUT linear mode format (X = Y × 2
Mantissa low byte (Y[7:0]) used in VOUT linear mode format (X = Y × 2
Description
Return the exponent (N) used in VOUT linear mode format (X = Y × 2
the VOUT_MODE register (Register 0x20, Bits[2:0]). The exponent is in twos complement format.
Mantissa high bits (Y[10:8]) used in VOUT linear mode format (X = Y × 2
Mantissa low byte (Y[7:0]) used in VOUT linear mode format (X = Y × 2
Description
Return the exponent (N) used in VOUT linear mode format (X = Y × 2
the VOUT_MODE register (Register 0x20, Bits[2:0]). The exponent is in twos complement format.
Mantissa high bits (Y[10:8]) used in VOUT linear mode format (X = Y × 2
Mantissa low byte (Y[7:0]) used in VOUT linear mode format (X = Y × 2
Description
Number of retry attempts following a fault condition. If the fault persists after the programmed
number of attempts, the output is disabled and remains off until the fault is cleared. A fault
condition can be cleared by a reset, a power-off/power-on sequence, or a loss of bias power. The
time between restart attempts is specified by Delay Time 2 (Bits[2:0]).
Bit 5
0
0
0
0
1
1
1
1
Delay Time 1 is the delay before the device disables the output after a fault condition is detected.
Delay Time 2 is the time between restart attempts.
Bit 2
0
0
0
0
1
1
1
1
Bit 4
0
0
1
1
0
0
1
1
Bit 1
0
0
1
1
0
0
1
1
Bit 3
0
1
0
1
0
1
0
1
Bit 0
0
1
0
1
0
1
0
1
Rev. 0 | Page 48 of 84
Number of Retries
0
1
2
3
4
5
6
Infinite
Delay Time 1
10 ms
20 ms
40 ms
80 ms
160 ms
320 ms
640 ms
1280 ms
Delay Time 2
252 ms
558 ms
924 ms
1260 ms
1596 ms
1932 ms
2268 ms
2604 ms
N
N
N
). The exponent (N) is set in
). The exponent (N) is set in
). The exponent (N) is set in
N
N
N
).
).
).
N
N
N
).
).
).
Data Sheet