MAX98089EVKIT+WLP Maxim Integrated, MAX98089EVKIT+WLP Datasheet - Page 67

• Manufacturer Part Number: MAX98089EVKIT+WLP
• Description: Audio IC Development Tools
• Manufacturer: Maxim Integrated
• Type: Audio CODECr

Specifications of MAX98089EVKIT+WLP

• Product: Evaluation Kits
• Tool Is For Evaluation Of: MAX98089
• Operating Supply Voltage: 2.8 V to 5.5 V
• Interface Type: I2C
• Operating Supply Current: 1 A

The IC includes comprehensive power management to allow the disabling of all unused circuits, minimizing supply
current.
Table 2. Power Management Registers
Maxim Integrated
REGISTER
0x4C
0x51
BIT
7
6
3
2
1
0
7
6
3
1
0
PERFMODE
HPPLYBCK
PWRSV8K
VBATEN
PWRSV
ADLEN
ADREN
INAEN
INBEN
NAME
SHDN
MBEN
Global Shutdown. Disables everything except the headset detection circuitry, which is
controlled separately.
0 = Device Shutdown
1 = Device Enabled
See the Battery Measurement section.
Performance Mode. Selects DAC to headphone playback performance mode.
0 = High performance playback mode.
1 = Low power playback mode.
power playback when using DAC to headphone playback path only. When enabled, this
bit overrides the System Bias Control register settings. When disabled, the System Bias
Control register is used to enable system bias blocks. Set both HPPLYBCK and PER-
FMODE for lowest power consumption when using DAC to headphone playback path
only.
0 = Disabled
1 = Enabled
8kHz Power Save Mode. PWRSV8K configures the ADC for reduced power consump-
tion when f
for more power savings.
0 = Normal, high-performance mode.
1 = Low power mode.
Power Save Mode. PWRSV configures the ADC for reduced power consumption for all
sample rates. PWRSV can be used in conjunction with PWRSV8K for more power sav-
ings.
0 = Normal, high-performance mode.
1 = Low-power mode.
Line Input A Enable
0 = Disabled
1 = Enabled
Line Input B Enable
0 = Disabled
1 = Enabled
Microphone Bias Enable
0 = Disabled
1 = Enabled
Left ADC Enable
0 = Disabled
1 = Enabled
Right ADC Enable
0 = Disabled
1 = Enabled
Headphone Only Playback Mode. Configures System Bias Control register bits for low
Low-Power, Stereo Audio Codec
S
= 8kHz. PWRSV8K can be used in conjunction with PWRSV when f
with FlexSound Technology
DESCRIPTION
Power Management
MAX98089
S
= 8kHz
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