HSC-ADC-EVALDZ Analog Devices, HSC-ADC-EVALDZ Datasheet - Page 11

• Manufacturer Part Number: HSC-ADC-EVALDZ
• Description: Data Conversion IC Development Tools Data Converter Evaluation Platform
• Manufacturer: Analog Devices
• Type: ADCr
• Series: HSC_EVALBOARDr

Specifications of HSC-ADC-EVALDZ

• Rohs: yes
• Product: Evaluation Platforms
• Tool Is For Evaluation Of: ADC Devices
• Interface Type: USB
• Operating Supply Voltage: 12 V
• Operating Supply Current: 3 A
• Factory Pack Quantity: 1
• For Use With: ADC Evaluation Boards

C
B
A
D
8
8
AWE_N
ASYNC_AMS1
2.5VD
TMS
TCK
TDO
TDI
1
2
JTAG
2.5VD
5
3
DGND
CONNECTOR
DGND
10
11
12
13
14
1
2
3
4
5
6
7
8
9
U1101
NC7SZ32P5X
4
7
P1101
7
DGND
C1101
0.1UF
CCLK
2.5VD
R1102
4.7K
R1112
4.7K
DNI
DGND
CLEAR
6
M2
_______________________
OFF
R1103
4.7K
R1113
4.7K
DNI
6
M1
OFF
1
2
FPGA
DGND
CONFIG
N1
N2
S1101
EVQ-PAC05R
M0
ON
R1104
4.7K
R1114
4.7K
DNI
N3
N4
SLAVE
3
4
PUSHBUTTON
FPGA_PH10_PROG_B
FPGA_PH11_CSI_B
TCK
TMS
TDI
SELECTMAP
3.3VD
R1101
4.7K
C1105
0.1UF
PH10_PROG_B
R1105
4.7K
CONFIGURATION
DGND
R13
R14
AG6
AD6
P14
P13
AB6
AA6
M7
F6
D6
C6
N7
H6
G6
Y6
5
M0_0
M1_0
M2_0
VP_0
VN_0
VREFP_0
VREFN_0
HSWAPEN_0
PROGRAM_B_0
DIN_0
RDWR_B_0
CSI_B_0
TCK_0
TMS_0
TDI_0
VFS_0
5
AVDD_0
VBATT_0
N13
2.5VD
AVSS_0
FPGA_PH14_INIT_B
FPGA_PH10_PROG_B
FPGA_PH11_CSI_B
FPGA_PH12_DONE
VCCO_23
DGND
XC6VLX75T-2FFG784C
2.5VD
DGND
C1102
0.1UF
DOUT_BUSY_0
VCCO_0
2.5VD
INIT_B_0
DONE_0
CCLK_0
DXP_0
DXN_0
TDO_0
U101
M6
L6
T14
T13
AF6
AH6
Y7
15
10
9
3
4
5
6
2
7
OE_N
A0
A1
A2
A3
T_R0_N
T_R1_N
T_R2_N
T_R3_N
VCCA
1
GND
8
4
4
DGND
R1106
4.7K
PAD
16
VCCB
PAD
B0
B1
B2
B3
U1102
FXL4TD245BQX
R1107
4.7K
14
13
12
11
3.3VD
R1108
330
DGND
C1103
0.1UF
PH14_INIT_B
PH10_PROG_B
PH11_CSI_B
PH12_DONE
R1109
4.7K
R1110
4.7K
FPGA_PH14_INIT_B
FPGA_PH12_DONE
CCLK
TDO
3
3
THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.
IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE OR
IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,
OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS
OF ANALOG DEVICES.
THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS
OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.
FPGA_PH12_DONE
AN
D
E
V
A
C
L G
O
E
S
2
A
HADV6
DESIGN VIEW
PTD ENGINEER
-
<PRODUCT_1>
2.5VD
<DESIGN_VIEW>
<PTD_ENGINEER>
VCC
GND
5
3
NC7SZ05M5X
DGND
U1103
Y
4
REV
2
2
R1111
49.9
DESCRIPTION
SCHEMATIC
C1104
0.1UF
REVISIONS
DRAWING NO.
SIZE
D D D
-
D
SCALE
<SCALE>
DATE
1
SHEET
1
11
APPROVED
OF
D
REV
17
D
C
B
A