78M6610+PSU/EK#1 Maxim Integrated, 78M6610+PSU/EK#1 Datasheet - Page 52
78M6610+PSU/EK#1
Manufacturer Part Number
78M6610+PSU/EK#1
Description
Development Boards & Kits - Other Processors 78M6610 EVAL KIT
Manufacturer
Maxim Integrated
Datasheet
1.78M6610PSUEK1.pdf
(63 pages)
Specifications of 78M6610+PSU/EK#1
Rohs
yes
Part # Aliases
90-X6610#KK1
- Current page: 52 of 63
- Download datasheet (707Kb)
This read operation is not limited to 3 bytes but can be extended until the register address pointer
reaches its maximum value.
78M6610+PSU Data Sheet
If the register address pointer has not been set by previous operations, it is necessary to set it issuing a
command as follows:
Random Read: random read operations allow the master to access any register in a random manner. To
perform this operation, the register address must be set as part of the write operation. After the address is
sent, the master generates a start condition following the acknowledge response. This sequence
completes the write operation. The master should issue the control byte again this time, with the R/W bit
set to 1 to indicate a read operation. The 78M6610+PSU will issue the acknowledge response, and
transmit the data.
At the end of the transaction the master will not acknowledge the transfer and generate a STOP
condition.
52
S
S
S
T
A
R
T
S
T
A
R
T
0 1 2 3 4 5 6
0 1 2 3 4 5 6
Device Address
Device Address
0
A
C
K
0
S
A
C
K
0
Register Address (n)
1
S
2 3 4 5 6 7
0
Register Address (n)
1
2 3 4 5 6 7
A
C
K
S
R
S
T
A
R
T
0 1 2 3 4 5 6
Device Address
A
C
K
P
S
T
O
P
1
A
C
K
7
6
5 4 3 2 1 0
Data
0
1 2 3 4 5 6 7
Data
A
C
K
0
1 2 3 4 5 6 7
Data
Rev 1
N
O
A
C
K
S
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