ADP5586CB-EVALZ Analog Devices, ADP5586CB-EVALZ Datasheet
ADP5586CB-EVALZ
Specifications of ADP5586CB-EVALZ
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ADP5586CB-EVALZ Summary of contents
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... Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. ...
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ADP5586 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... Timing Specifications ............................................................ 4 2 Absolute Maximum Ratings ............................................................ 5 Thermal Resistance ...
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Data Sheet SPECIFICATIONS VDD = 1 3 −40°C to +85°C, unless otherwise noted Table 1. Parameter SUPPLY VOLTAGE VDD Input Voltage Range Undervoltage Lockout Threshold SUPPLY CURRENT Standby Current Operating Current ...
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ADP5586 TIMING SPECIFICATIONS Table 2. Parameter TIMING SPECIFICATIONS 2 Delay from UVLO/RST Inactive Access f SCL t HIGH t LOW t SU; DAT t HD; DAT t SU; STA t HD; ...
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Data Sheet ABSOLUTE MAXIMUM RATINGS Table 3. Parameter VDD to GND SCL, SDA, RST, INT, R0, R1, R2, R3, R4, C0, C1, C2, C3, C4 Temperature Range Operating (Ambient) Operating (Junction) Storage 1 In applications where high power dissipation and ...
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ADP5586 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 5. Pin Function Descriptions Pin No. Mnemonic Description A1 VDD Supply Voltage Input SDA I C Data Input/Output SCL I C Clock Input. A4 GND Ground GPIO ...
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Data Sheet THEORY OF OPERATION ADP5586 RST/R5* SDA SCL I/O CONFIGURATION C4 *R5 AVAILABLE ON ADP5586ACBZ-01-R7 ONLY. VDD UVLO OSCILLATOR POR INTERFACE BUSY? KEY EVENT ...
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... Contact your local Analog Devices, Inc., field applications engineers for availability and/or alternate configurations. Table 6. Matrix Options by Device Model Model ADP5586ACBZ-00-R7 ADP5586ACBZ-01-R7 ADP5586ACBZ-03-R7 1 Contact Analog Devices for availability of configurations not shown here. I/O Rev Page Data Sheet 2 C interface. Feedback of device is offered with three feature sets. Table 6 lists 1 ...
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Data Sheet FUNCTIONAL DESCRIPTION EVENT FIFO Before going into detail on the various blocks of the ADP5586 important to understand the function of the event FIFO that is featured in the ADP5586. The event FIFO (Register 0x03 to ...
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ADP5586 KEY SCAN CONTROL General The 10 input/output pins can be configured to decode a keypad matrix maximum size of 25 switches (5 × 5 matrix) using the PIN_CONFIG_A, PIN_CONFIG_B, and PIN_CONFIG_C registers (Registers 0x3A through 0x3C). ...
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Data Sheet PIN_CONFIG_A[7:0] PIN_CONFIG_B[7:0] PIN_CONFIG_C[7:0] RESET_TRIG_TIME[3:0] RESET_EVENT_A[7:0] RESET_EVENT_B[7:0] RESET_EVENT_C[7:0] *R5 AVAILABLE ON ADP5586ACBZ-01-R7 ONLY. Figure 10 shows a detailed representation of the key scan block and its associated control and status signals. When all row and column pins are used, ...
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ADP5586 The EVENT_INT interrupt (Register 0x01, Bit 0) can be triggered by both press and release key events. As shown in Figure 12, if Key 3 is pressed, EVENT_INT is asserted, EC[4:0] is updated, and the FIFO is updated. During ...
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Data Sheet GPI INPUT Each of the 10 input/output lines can be configured as a general- purpose logic input line using the GPIO_INP_EN_A and GPIO_INP_EN_B registers (Register 0x29 and Register 0x2A). GPIO lines can be configured to allow both input ...
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ADP5586 LOGIC BLOCK Several of the ADP5586 input/output lines can be used as inputs and outputs for implementing some common logic functions. The R1, R2, and R3 input/output pins can be used as inputs, and the R0 input/output pin can ...
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Data Sheet RESET BLOCK The ADP5586 features a reset block that can generate reset con- ditions if certain events are detected simultaneously three reset trigger events can be programmed for RESET_OUT. The event scan control blocks monitor whether ...
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ADP5586 PULSE GENERATORS The ADP5586 contains two pulse generators that are suitable for driving indicator LED drive signals, as well as watchdog timers and other extended time pulsed applications. The for eight bits of definition for both the on time ...
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Data Sheet REGISTER INTERFACE Register access to the ADP5586 is acquired via its I serial interface. The interface can support clock frequencies MHz. If the user is accessing the FIFO or key event counter (KEC), FIFO/KEC ...
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ADP5586 Figure 27 shows a typical multibyte read sequence for reading internal registers. The cycle begins with a start condition followed by the 7-bit device address (0x34), followed by the R/ W bit set to 0 for a write cycle. ...
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Data Sheet REGISTER MAP Table 7. Reg Register Addr Name R/W 1 Bit 7 0x00 ID R 0x01 INT_STATUS R/W 0x02 Status R Reserved 0x03 FIFO_1 R EVENT1_STATE 0x04 FIFO_2 R EVENT2_STATE 0x05 FIFO_3 R EVENT3_STATE 0x06 FIFO_4 R EVENT4_STATE ...
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ADP5586 Reg Register Addr Name R/W 1 Bit 7 0x29 GPIO_INP_EN_A R/W 0x2A GPIO_INP_EN_B R/W 0x2B RESET_EVENT_A R/W RESET_EVENT_ A_LEVEL 0x2C RESET_EVENT_B R/W RESET_EVENT_ B_LEVEL 0x2D RESET_EVENT_C R/W RESET_EVENT_ C_LEVEL 0x2E RESET_CFG R/W RESET_POL 0x2F PULSE_GEN_1_ R/W DELAY 0x30 PULSE_GEN_1_ ...
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Data Sheet DETAILED REGISTER DESCRIPTIONS Note that all registers default to 0000 0000, unless otherwise specified. ID, Register 0x00 Default: 0011 XXXX (where X = don’t care) Table 8. ID Bit Descriptions Bits Bit Name Access [7:4] MAN_ID Read only ...
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ADP5586 Table 12. Event Decoding Event No. Meaning 0 No event 1 Key 1 (R0, C0) 2 Key 2 (R0, C1) 3 Key 3 (R0, C2) 4 Key 4 (R0, C3) 5 Key 5 (R0, C4) 6 Key 6 (R1, ...
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Data Sheet FIFO_6 Register 0x08 Table 17. FIFO_6 Bit Descriptions Bits Bit Name 7 EVENT6_STATE [6:0] EVENT6_IDENTIFIER[6:0] FIFO_7, Register 0x09 Table 18. FIFO_7 Bit Descriptions Bits Bit Name 7 EVENT7_STATE [6:0] EVENT7_IDENTIFIER[6:0] FIFO_8, Register 0x0A Table 19. FIFO_8 Bit Descriptions ...
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ADP5586 FIFO_14, Register 0x10 Table 25. FIFO_14 Bit Descriptions Bits Bit Name 7 EVENT14_STATE [6:0] EVENT14_IDENTIFIER[6:0] FIFO_15, Register 0x11 Table 26. FIFO_15 Bit Descriptions Bits Bit Name 7 EVENT15_STATE [6:0] EVENT15_IDENTIFIER[6:0] FIFO_16, Register 0x12 Table 27. FIFO_16 Bit Descriptions Bits ...
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Data Sheet GPI_STATUS_A, Register 0x15 Table 30. GPI_STATUS_A Bit Descriptions Bits Bit Name Access [7:6] Reserved Reserved 5 GPI_6_STAT Read only 4 GPI_5_STAT Read only 3 GPI_4_STAT Read only 2 GPI_3_STAT Read only 1 GPI_2_STAT Read only 0 GPI_1_STAT Read ...
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ADP5586 R_PULL_CONFIG_A, Register 0x17 Default = 0101 0101 Table 32. R_PULL_CONFIG_A Bit Descriptions Bits Bit Name Access [7:6] R3_PULL_CFG Read/write [5:4] R2_PULL_CFG Read/write [3:2] R1_PULL_CFG Read/write [1:0] R0_PULL_CFG Read/write R_PULL_CONFIG_B, Register 0x18 Default = 0000 0101 Table 33. R_PULL_CONFIG_B Bit ...
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Data Sheet R_PULL_CONFIG_D, Register 0x1A Default = 0000 0001 Table 35. R_PULL_CONFIG_D Bit Descriptions Bits Bit Name Access [7:2] Reserved Reserved [1:0] C4_PULL_CFG Read/write GPI_INT_LEVEL_A, Register 0x1B Table 36. GPI_INT_LEVEL_A Bit Descriptions Bits Bit Name Access [7:6] Reserved Reserved 5 ...
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ADP5586 GPI_EVENT_EN_A, Register 0x1D Table 38. GPI_EVENT_EN_A Bit Descriptions Bits Bit Name Access [7:6] Reserved Reserved 5 GPI_6_EVENT_EN Read/write 4 GPI_5_EVENT_EN Read/write 3 GPI_4_EVENT_EN Read/write 2 GPI_3_EVENT_EN Read/write 1 GPI_2_EVENT_EN Read/write 0 GPI_1_EVENT_EN Read/write 1 GPIs in this mode are ...
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Data Sheet GPI_INTERRUPT_EN_A, Register 0x1F Table 40. GPI_INTERRUPT_EN_A Bit Descriptions Bits Bit Name Access [7:6] Reserved Reserved 5 GPI_6_INT_EN Read/write 4 GPI_5_INT_EN Read/write 3 GPI_4_INT_EN Read/write 2 GPI_3_INT_EN Read/write 1 GPI_2_INT_EN Read/write 0 GPI_1_INT_EN Read/write GPI_INTERRUPT_EN_B, Register 0x20 Table 41. ...
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ADP5586 DEBOUNCE_DIS_A, Register 0x21 Table 42. DEBOUNCE_DIS_A Bit Descriptions Bits Bit Name [7:6] Reserved 5 GPI_6_DEB_DIS 4 GPI_5_DEB_DIS 3 GPI_4_DEB_DIS 2 GPI_3_DEB_DIS 1 GPI_2_DEB_DIS 0 GPI_1_DEB_DIS DEBOUNCE_DIS_B, Register 0x22 Table 43. DEBOUNCE_DIS_B Bit Descriptions Bits Bit Name [7:5] Reserved 4 ...
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Data Sheet GPO_DATA_OUT_B, Register 0x24 Table 45. GPO_DATA_OUT_B Bit Descriptions Bits Bit Name [7:5] Reserved 4 GPO_11_DATA 3 GPO_10_DATA 2 GPO_9_DATA 1 GPO_8_DATA 0 GPO_7_DATA GPO_OUT_MODE_A, Register 0x25 Table 46. GPO_OUT_MODE_A Bit Descriptions Bits Bit Name [7:6] Reserved 5 GPO_6_OUT_MODE ...
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ADP5586 GPIO_OUT_EN_A, Register 0x27 Table 48. GPIO_OUT_EN_A Bit Descriptions Bits Bit Name [7:6] Reserved 5 GPIO_6_OUT_EN 4 GPIO_5_OUT_EN 3 GPIO_4_OUT_EN 2 GPIO_3_OUT_EN 1 GPIO_2_OUT_EN 0 GPIO_1_OUT_EN GPIO_OUT_EN_B, Register 0x28 Table 49. GPIO_OUT_EN_B Bit Descriptions Bits Bit Name [7:5] Reserved 4 ...
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Data Sheet GPIO_INP_EN_B, Register 0x2A Table 51. GPIO_INP_EN_B Bit Descriptions Bits Bit Name [7:5] Reserved 4 GPIO_11_INP_EN 3 GPIO_10_INP_EN 2 GPIO_9_INP_EN 1 GPIO_8_INP_EN 0 GPIO_7_INP_EN RESET_EVENT_A, Register 0x2B Table 52. RESET_EVENT_A Bit Descriptions Bits Bit Name 7 RESET_EVENT_A_LEVEL [6:0] RESET_EVENT_A[6:0] ...
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ADP5586 RESET_CFG, Register 0x2E Table 55. RESET_CFG Bit Descriptions Bits Bit Name 7 RESET_POL 6 RST_PASSTHRU_EN [5:2] RESET_TRIG_TIME[3:0] [1:0] RESET_PULSE_WIDTH[1:0] PULSE_GEN_1_DELAY, Register 0x2F Table 56. PULSE_GEN_1_DELAY Bit Descriptions Bits Bit Name [7:0] PULSE_GEN_1_DELAY[7:0] Access Description Read/write Sets the polarity of ...
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Data Sheet PULSE_GEN_1_PERIOD, Register 0x30 Table 57. PULSE_GEN_1_PERIOD Bit Descriptions Bits Bit Name [7:0] PULSE_GEN_1_PERIOD[7:0] PULSE_GEN_1_ON_TIME, Register 0x31 Table 58. PULSE_GEN_1_ON_TIME Bit Descriptions Bits Bit Name [7:0] PULSE_GEN_1_ON_TIME[7:0] PULSE_GEN_2_DELAY, Register 0x32 Table 59. PULSE_GEN_2_DELAY Bit Descriptions Bits Bit Name [7:0] ...
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ADP5586 PULSE_GEN_2_PERIOD, Register 0x33 Table 60. PULSE_GEN_2_PERIOD Bit Descriptions Bits Bit Name [7:0] PULSE_GEN_2_PERIOD[7:0] PULSE_GEN_2_ON_TIME, Register 0x34 Table 61. PULSE_GEN_2_ON_TIME Bit Descriptions Bits Bit Name [7:0] PULSE_GEN_2_ON_TIME[7:0] Access Description Read/write Defines period of Pulse Generator 2. Period is defined as ...
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Data Sheet PULSE_GEN_CONFIG, Register 0x35 Table 62. PULSE_GEN_CONFIG Bit Descriptions Bits Bit Name Access 7 PULSE_GEN_1_INV Read/write 6 PULSE_GEN_1_ON_CLK Read/write 5 PULSE_GEN_1_PRD_CLK Read/write 4 PULSE_GEN_1_EN Read/write 3 PULSE_GEN_2_INV Read/write 2 PULSE_GEN_2_ON_CLK Read/write 1 PULSE_GEN_2_PRD_CLK Read/write 0 PULSE_GEN_2_EN Read/write LOGIC_CFG, Register ...
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ADP5586 LOGIC_FF_CFG, Register 0x37 Table 64. LOGIC_FF_CFG Bit Descriptions Bits Bit Name Access [7:2] Reserved Reserved 1 FF_SET Read/write 0 FF_CLR Read/write LOGIC_INT_EVENT_EN, Register 0x38 Table 65. LOGIC_INT_EVENT_EN Bit Descriptions Bits Bit Name Access [7:3] Reserved Reserved 2 LY_DBNC_DIS Read/write ...
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Data Sheet PIN_CONFIG_B, Register 0x3B Table 68. PIN_CONFIG_B Bit Descriptions Bits Bit Name Access [7:5] Reserved Reserved 4 C4_CONFIG Read/write 3 C3_CONFIG Read/write 2 C2_CONFIG Read/write 1 C1_CONFIG Read/write 0 C0_CONFIG Read/write PIN_CONFIG_C, Register 0x3C Table 69. PIN_CONFIG_C Bit Descriptions ...
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ADP5586 INT_EN, Register 0x3E Table 71. INT_EN Bit Descriptions Bits Bit Name [7:5] Reserved 4 LOGIC_IEN 3 Reserved 2 OVRFLOW_IEN 1 GPI_IEN 0 EVENT_IEN Access Description Reserved Reserved. Read/write 0 = Logic 1 interrupt is disabled asserts the ...
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Data Sheet APPLICATIONS SCHEMATIC VDD KP/LOGIC OUTPUT/GPI/GPO KP/LOGIC INPUT/GPI/GPO KP/LOGIC INPUT/GPI/GPO KP/LOGIC INPUT/GPI/GPO KP/RESET OUTPUT/GPI/GPO INT RST HOST PROCESSOR SCL SDA ...
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... SEATING PLANE ORDERING GUIDE Model 1 Temperature Range ADP5586ACBZ-00-R7 −40°C to +85°C ADP5586ACBZ-01-R7 −40°C to +85°C ADP5586ACBZ-03-R7 −40°C to +85°C ADP5586CB-EVALZ Z = RoHS Compliant Part. 1 1.630 1.590 SQ 1.550 4 3 1.20 REF 0.40 REF TOP VIEW BOTTOM VIEW (BALL SIDE DOWN) ...
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Data Sheet NOTES Rev Page ADP5586 ...
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... ADP5586 NOTES refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ©2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D11148-0-3/13(0) Rev Page Data Sheet ...