ADP2442-EVALZ Analog Devices, ADP2442-EVALZ Datasheet - Page 6

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ADP2442-EVALZ

Manufacturer Part Number
ADP2442-EVALZ
Description
Power Management IC Development Tools Eval board
Manufacturer
Analog Devices
Type
DC/DC Converters, Regulators & Controllersr
Series
ADP2442r
Datasheet

Specifications of ADP2442-EVALZ

Rohs
yes
Tool Is For Evaluation Of
ADP2442
Factory Pack Quantity
1
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
ADP2442
Mnemonic
FB
COMP
EN
PGOOD
FREQ
SYNC/MODE
PGND
SW
VIN
BST
VCC
AGND
EP
Description
Feedback. The FB regulation voltage is 0.6 V. Connect this pin to a resistor divider from the output of the dc-to-dc
regulator.
Error Amplifier Compensation. Connect a resistor and a capacitor in series to ground.
Precision Enable. This features offers ±5% accuracy when using a 1.25 V reference voltage. Pull this pin high to
enable the regulator and pull it low to disable the regulator. Do not leave this pin floating.
Active High Power Good Output. This pin is pulled low when the output is out of regulation.
Switching Frequency. A resistor to AGND sets the switching frequency (see the Setting the Switching Frequency
section). Do not leave this pin floating.
External Clock Synchronization/Mode Pin. This pin can be used for external frequency synchronization and for
setting forced fixed frequency mode or pulse skip mode. SYNC/MODE accepts an external clock signal, and when
pulled high to 5 V, it sets the mode as forced fixed frequency mode. When this pin is tied to AGND, pulse skip
mode is enabled. Do not leave the SYNC/MODE pin floating.
Power Ground. Connect a decoupling ceramic capacitor as close as possible between the VIN pin and PGND.
Connect this pin directly to the exposed pad.
Switch. The midpoint for the drain of the low-side N-channel power MOSFET switch and the source for the high-
side N-channel power MOSFET switch.
Power Supply Input. Connect this pin to the input power source, and connect a bypass ceramic capacitor directly
from this pin to PGND, as close as possible to the IC. The operation voltage is 4.5 V to 36 V.
Boost. Connect a 10 nF ceramic capacitor between the BST and SW pins as close to the IC as possible to form a
floating supply for the high-side N-channel power MOSFET driver. This capacitor is required to drive the gate of
the N-channel power MOSFET above the supply voltage.
Output of the Internal Low Dropout Regulator. This pin supplies power for the internal controller and driver
circuitry. Connect a 1 µF ceramic capacitor between VCC and AGND and a 1 µ F ceramic capacitor between VCC
and PGND. The VCC output is active when the EN pin voltage is more than 0.7 V.
Analog Ground. This pin is the internal ground for the control functions. Connect this pin to the exposed pad.
Exposed Pad. Connect the exposed pad to the system AGND plane and PGND plane.
COMP
NOTES
1. THE EXPOSED PAD SHOULD BE CONNECTED
TO THE SYSTEM AGND PLANE AND PGND PLANE.
EN
FB
1
2
3
Figure 3. Pin Configuration, Top View
ADP2442
VIEW
TOP
Rev. 0 | Page 6 of 36
9
7
8
VIN
SW
PGND
Data Sheet

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