ADP5034RE-EVALZ Analog Devices, ADP5034RE-EVALZ Datasheet - Page 25

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ADP5034RE-EVALZ

Manufacturer Part Number
ADP5034RE-EVALZ
Description
Power Management IC Development Tools TSSOP ADJ Voltage Apps Board
Manufacturer
Analog Devices
Series
ADP5034r
Datasheet

Specifications of ADP5034RE-EVALZ

Rohs
yes
Product
Evaluation Boards
Factory Pack Quantity
1
Data Sheet
PCB LAYOUT GUIDELINES
Poor layout can affect ADP5034 performance, causing electro-
magnetic interference (EMI) and electromagnetic compatibility
(EMC) problems, ground bounce, and voltage losses. Poor
layout can also affect regulation and stability. A good layout is
implemented using the following guidelines. Also, refer to the
UG-271
Place the inductor, input capacitor, and output capacitor
close to the IC using short tracks. These components carry
high switching frequencies, and large tracks act as antennas.
Route the output voltage path away from the inductor and
SW node to minimize noise and magnetic interference.
and UG-439 user guide.
Rev. D | Page 25 of 28
Maximize the size of ground metal on the component side
to help with thermal dissipation.
Use a ground plane with several vias connecting to the
component side ground to further reduce noise
interference on sensitive circuit nodes.
Connect VIN1, VIN2, and AVIN together close to the IC
using short tracks.
ADP5034

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