IS43R32800B-5BL ISSI, Integrated Silicon Solution Inc, IS43R32800B-5BL Datasheet - Page 5

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IS43R32800B-5BL

Manufacturer Part Number
IS43R32800B-5BL
Description
IC DDR SDRAM 256MBIT 144BGA
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
DDR SDRAMr
Datasheet

Specifications of IS43R32800B-5BL

Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
256M (8Mx32)
Speed
200MHz
Interface
Parallel
Voltage - Supply
2.4 V ~ 2.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
144-BGA
Organization
8Mx32
Density
256Mb
Address Bus
14b
Access Time (max)
700ps
Maximum Clock Rate
400MHz
Operating Supply Voltage (typ)
2.5V
Package Type
Mini BGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Supply Current
400mA
Pin Count
144
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IS43R32800B-5BL
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
Part Number:
IS43R32800B-5BL-TR
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
Prechar ge (P RE ) [ /RAS =L , /CA S =H, /WE = L]
Auto-Ref resh (REFA ) [ /RAS =/CA S =L, /WE = CK E = H]
Activate ( ACT) [/RA S =L, /CAS =/WE =H ]
Read (R EAD) [/RAS =H , /CA S =L, /WE = H]
Write (WRITE)
IS43R32800B
Integrated Silicon Solution, Inc. — www.issi.com
Rev. 00D
03/19/08
/CAS latency. When A8 =H at this command, the bank is deactivated after the burst read (auto-
precharge READ A )
ISSI's 256-Mbit DDR SDRAM
precharge , and auto / self refresh. E ach command is defined by control signals of /RA S, /CAS and
/WE at CLK rising edge. I n addition to 3 signals, /CS ,C KE and A8 are usedas chip select, refresh
option, and prechargeoption, respect ively. To know the detailed definition of commands, please
see the command truth table.
internally. A fter this command, the banks are precharged automatically.
(auto-precharge, WRITEA )
/write operation. When A8 =H at this command, all banks are deactivated (precharge all, PREA ).
FUNCTIONAL DESCRIPTION
AC T c ommand activates a row in an idle bank indicated by BA .
RE AD command starts burst read from the active bank indicated by BA . F irst output data appear s after
WR IT E c ommand starts burst write to the active bank indicated by BA . T otal data length to be written
is set by burst length. W hen A8 =H at this command, the bank is deactivated after the burst write
RE FA command starts auto-refresh cycle. R efresh address including bank address are generated
PR E c ommand deactivates the active bank indicated by BA . T his command also terminates burst read
/CLK
CL K
/CS
/RAS
/CAS
/WE
CK E
A8
[/RA S =H, /CAS =/WE =L ]
provides basic functions, bank (row) activate, burst read / write, bank (row)
Chip Select : L =select, H=deselect
Command
Command
Command
Refresh Option @ refresh command
Precharge Option @ precharge or read/write command
define basic commands
5

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