DS2788K Maxim Integrated, DS2788K Datasheet - Page 18

• Manufacturer Part Number: DS2788K
• Description: Power Management IC Development Tools
• Manufacturer: Maxim Integrated
• Series: DS2788r

The Status register contains bits that report the device
status. The bits can be set internally by the DS2788.
The CHGTF, AEF, SEF, and LEARNF bits are read-only
Stand-Alone Fuel-Gauge IC with
LED Display Drivers
RAAC [mAh] = (ACR[mVh] - AE(T) × FULL50[mVh]) × RSNSP [mhos]
RSAC [mAh] = (ACR[mVh] - SE(T) × FULL50[mVh]) × RSNSP [mhos]
RARC [%] = 100% × (ACR[mVh] - AE(T) × FULL50[mVh]) / {(AS × FULL(T) - AE(T)) × FULL50[mVh]}
RSRC [%] = 100% × (ACR[mVh] - SE(T) × FULL50[mVh]) / {(AS × FULL(T) - SE(T)) × FULL50[mVh]}
Figure 18. Status Register Format
18
*This bit can be set by the DS2788, and can only be cleared through the 1-Wire interface.
**LEARNF is only cleared if ACR reaches 0 after VOLT < VAE.
______________________________________________________________________________________
ADDRESS
Reserved
Reserved
LEARNF
CHGTF
PORF
Field
AEF
UVF
SEF
Bit
7
6
5
4
3
2
1
0
01h
Read/Write*
Read/Write*
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Format
Charge Termination Flag
Set to 1 when: (VOLT > VCHG) and (0 < IAVG < IMIN) continuously for a period
between two IAVG register updates (28s to 56s).
Cleared to 0 when: RARC < 90%
Active Empty Flag
Set to 1 when: VOLT < VAE
Cleared to 0 when: RARC > 5%
Standby Empty Flag
Set to 1 when: RSRC < 10%
Cleared to 0 when: RSRC > 15%
Learn Flag—When set to 1, a charge cycle can be used to learn battery capacity.
Set to 1 when: (VOLT falls from above VAE to below VAE) and (CURRENT > IAE)
Cleared to 0 when: (CHGTF = 1) or (CURRENT < 0) or (ACR = 0**) or (ACR
written or recalled from EEPROM) or (SLEEP Entered).
Undefined
Undervoltage Flag
Set to 1 when: VOLT < V
Cleared to 0 by: User
Power-On Reset Flag—Useful for reset detection, see text below.
Set to 1 when: upon power-up by hardware.
Cleared to 0 by: User
Undefined
bits that can be cleared by hardware. The UVF and
PORF bits can only be cleared through the 1-Wire
interface.
SLEEP
Allowable Values
BIT DEFINITION
Calculation of Results
Status Register