IS42S32800D-6TL ISSI, Integrated Silicon Solution Inc, IS42S32800D-6TL Datasheet - Page 28

• Manufacturer Part Number: IS42S32800D-6TL
• Description: IC SDRAM 256MBIT 166MHZ 86TSOP
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: SDRAMr

Specifications of IS42S32800D-6TL

• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 256M (8Mx32)
• Speed: 166MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 86-TSOPII
• Organization: 8Mx32
• Density: 256Mb
• Address Bus: 13b
• Access Time (max): 6.5/5.4ns
• Maximum Clock Rate: 166MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 180mA
• Pin Count: 86
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 166 MHz
• Access Time: 6.5 ns, 5.4 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Operating Current: 180 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

a longer burst. Following the PRECHARGE command, a
subsequent command to the same bank cannot be issued
until t
or full-page bursts.
Full-page READ bursts can be truncated with the BURST
may be truncated with a BURST TERMINATE command,
the clock edge at which the last desired data element is
valid, where x equals the CAS latency minus one. This is
possible CAS latency;data element n + 3 is the last desired
data element of a longer burst.
IS42S32800D, IS45S32800D
diagram for each possible CAS latency; data element n +
3 is either the last of a burst of four or the last desired of
hidden during the access of the last data element(s).
In the case of a fixed-length burst being executed to
completion, a PRECHARGE command issued at the
optimum time (as described above) provides the same
operation that would result from the same fixed-length
burst with auto precharge. The disadvantage of the PRE-
CHARGE command is that it requires that the command
and address buses be available at the appropriate time to
issue the command; the advantage of the PRECHARGE
command is that it can be used to truncate fixed-length
TERMINATE command, and fixed-length READ bursts
provided that auto precharge was not activated.The BURST
TERMINATE command should be issued x cycles before
shown in the READ Burst Termination diagram for each
28
rp
is met. Note that part of the row precharge time is
Integrated Silicon Solution, Inc. - www.issi.com
12/01/09
Rev. C