MT41J64M16LA-187E:B TR Micron Technology Inc, MT41J64M16LA-187E:B TR Datasheet - Page 175

IC DDR3 SDRAM 1GBIT 96FBGA

MT41J64M16LA-187E:B TR

Manufacturer Part Number
MT41J64M16LA-187E:B TR
Description
IC DDR3 SDRAM 1GBIT 96FBGA
Manufacturer
Micron Technology Inc
Type
DDR3 SDRAMr

Specifications of MT41J64M16LA-187E:B TR

Format - Memory
RAM
Memory Type
DDR3 SDRAM
Memory Size
1G (64M x 16)
Speed
533MHz
Interface
Parallel
Voltage - Supply
1.425 V ~ 1.575 V
Operating Temperature
0°C ~ 95°C
Package / Case
96-FBGA
Organization
64Mx16
Density
1Gb
Address Bus
16b
Maximum Clock Rate
1.066GHz
Operating Supply Voltage (typ)
1.5V
Package Type
FBGA
Operating Temp Range
0C to 95C
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Supply Current
265mA
Pin Count
96
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1378-2
Table 83:
Figure 120: Synchronous to Asynchronous Transition During Precharge Power-Down (DLL Off) Entry
Description
Power-down entry transition period (power-down entry)
Power-down exit transition period (power-down exit)
ODT to R
ODT to R
t
or synchronous
or synchronous
ANPD
asynchronous
asynchronous
asynchronous
asynchronous
DRAM R
DRAM R
synchronous
synchronous
DRAM R
Command
ODT A
ODT B
ODT C
CKE
TT
TT
CK#
TT
CK
A
B
C
TT
TT
turn-on delay (ODTL on = WL - 2)
turn-off delay (ODTL off = WL - 2)
NOP
T0
ODT Parameters for Power-Down (DLL Off) Entry and Exit Transition Period
Notes:
REF
T1
1. AL = 0; CWL = 5; ODTL off = WL - 2 = 3.
NOP
T2
R
TT
NOP
_
T3
NOM
R
TT
NOP
T4
_
NOM
ODTL off
t ANPD
NOP
T5
NOP
T6
t AOF (MIN)
t AOF (MAX)
Lesser of:
Lesser of:
NOP
T7
ODTL on
ODTL off
t RFC (MIN)
R
TT
_
NOM
PDE transition period
NOP
T8
t
t
AONPD (MIN) (1ns) or
AOFPD (MIN) (1ns) or
×
×
t
t
CK +
Min
CK +
Greater of:
WL - 1 (greater of ODTL off + 1 or ODTL on + 1)
NOP
T9
t
t
AON (MIN)
AOF (MIN)
ODTL off + t AOFPD (MIN)
t AOFPD (MIN)
t AOFPD (MAX)
ODTL off + t AOFPD (MAX)
T10
NOP
t
ANPD or
t
ANPD +
T11
NOP
t
RFC - refresh to CKE LOW
T12
NOP
t
XPDLL
Indicates A Break In
Time Scale
Greater of:
Greater of:
ODTL on
ODTL off
T13
NOP
Ta0
NOP
t
t
×
AONPD (MAX) (9ns) or
×
AOFPD (MAX) (9ns) or
t
t
CK +
CK +
Max
Transitioning
Ta1
NOP
t
t
AON (MAX)
AOF (MAX)
t AOFPD (MIN)
t AOFPD (MAX)
Ta2
NOP
Don’t Care
NOP
Ta3

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