IS61VPS25636A-200TQLI ISSI, Integrated Silicon Solution Inc, IS61VPS25636A-200TQLI Datasheet - Page 17

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IS61VPS25636A-200TQLI

Manufacturer Part Number
IS61VPS25636A-200TQLI
Description
IC SRAM 9MBIT 200MHZ 100TQFP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet

Specifications of IS61VPS25636A-200TQLI

Format - Memory
RAM
Memory Type
SRAM - Synchronous
Memory Size
9M (256K x 36)
Speed
200MHz
Interface
Parallel
Voltage - Supply
2.375 V ~ 2.625 V
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Density
9Mb
Access Time (max)
3.1ns
Sync/async
Synchronous
Architecture
SDR
Clock Freq (max)
200MHz
Operating Supply Voltage (typ)
2.5V
Address Bus
18b
Package Type
TQFP
Operating Temp Range
-40C to 85C
Number Of Ports
4
Supply Current
275mA
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
2.625V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Word Size
36b
Number Of Words
256K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IS61VPS25636A-200TQLI
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
Part Number:
IS61VPS25636A-200TQLI-TR
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
IS61LPS51218A, IS61LPS25636A, IS61LPS25632A, IS64LPS25636A,
IS61VPS51218A, IS61VPS25636A
READ/WRITE CYCLE SWITCHINg CHARACTERISTICS
Note:
1. Configuration signal MODE is static and must not change during normal operation.
2. Guaranteed but not 100% tested. This parameter is periodically sampled.
3. Tested with load in Figure 2.
Integrated Silicon Solution, Inc.
Rev. K
01/19/10
Symbol
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
MAx
kc
kh
kl
kq
kqx
kqlZ
kqhZ
OEq
OElZ
OEhZ
As
Ws
cEs
AVs
ds
Ah
Wh
cEh
AVh
dh
Pds
Pus
(2)
(2,3)
(2,3)
(2,3)
(2,3)
Parameter
Clock Frequency
Cycle Time
Clock High Time
Clock Low Time
Clock Access Time
Clock High to Output Invalid
Clock High to Output Low-Z
Clock High to Output High-Z
Output Enable to Output Valid
Output Enable to Output Low-Z
Output Disable to Output High-Z
Address Setup Time
Read/Write Setup Time
Chip Enable Setup Time
Address Advance Setup Time
Data Setup Time
Address Hold Time
Write Hold Time
Chip Enable Hold Time
Address Advance Hold Time
Data Hold Time
ZZ High to Power Down
ZZ Low to Power Down
Min.
4.0
1.7
1.7
0.8
0.8
1.2
1.2
1.2
1.2
1.2
0.3
0.3
0.3
0.3
0.3
0
-250
Max.
250
2.6
2.6
2.6
2.6
2
2
Min.
1.5
1.4
1.4
1.4
1.4
1.4
0.4
0.4
0.4
0.4
0.4
5
2
2
1
0
-200
(Over Operating Range)
Max.
200
3.1
3.0
3.1
3.0
2
2
Min.
2.4
2.3
1.5
1.5
3.5
3.5
3.5
1.7
1.7
1.7
1.7
1.7
0.7
0.7
0.7
0.7
0.7
6
0
-166
Max.
166
3.8
2
2
MHz
Unit
cyc
cyc
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
17

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