IS42S32160C-75BLI ISSI, Integrated Silicon Solution Inc, IS42S32160C-75BLI Datasheet - Page 8
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IS42S32160C-75BLI
Manufacturer Part Number
IS42S32160C-75BLI
Description
IC SDRAM 512MBIT 133MHZ 90BGA
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
SDRAMr
Datasheet
1.IS42S32160C-6BI.pdf
(60 pages)
Specifications of IS42S32160C-75BLI
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
512M (16M x 32)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
90-BGA
Organization
16Mx32
Density
512Mb
Address Bus
15b
Access Time (max)
6.5/6ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
WBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
260mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IS42S32160C-75BLI
Manufacturer:
ISSI
Quantity:
1 000
Company:
Part Number:
IS42S32160C-75BLI
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
Company:
Part Number:
IS42S32160C-75BLI-TR
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
IS42S32160C
8
The DQM inputs are used to avoid I/O contention on the DQ pins when the interrupt comes from a Write command.The
DQMs must be asserted (HIGH)at least two clocks prior to the Write command to suppress data-out on the DQ pins.To
guarantee the DQ pins against I/O contention,a single cycle with high-impedance on the DQ pins must occur between the
last read data and the Write command (refer to the following three figures).If the data output of the burst read occurs at the
second clock of the burst write,the DQMs must be asserted (HIGH)at least one clock prior to the Write command to avoid
internal bus contention.
CAS# latency=2
t CK2 , DQ- s
CLK
COMMAND
CAS# latency=3
t CK3 , DQ- s
Read Interrupted by a Read (Burst Length =4,CAS#Latency =2,3)
READ A
T0
READ B
T1
DOUT A 0
T2
NOP
DOUT B 0
NOP
T3
DOUT A 0
DOUT B 0
NOP
T4
DOUT B 1
NOP
DOUT B 2
T5
DOUT B 1
NOP
T6
DOUT B 3
DOUT B
Integrated Silicon Solution, Inc.
2
T7
NOP
DOUT B 3
NOP
T8
Rev. B
01/22/09