M25P10-AVMN6TP NUMONYX, M25P10-AVMN6TP Datasheet - Page 19

IC FLASH 1MBIT 50MHZ 8SOIC

M25P10-AVMN6TP

Manufacturer Part Number
M25P10-AVMN6TP
Description
IC FLASH 1MBIT 50MHZ 8SOIC
Manufacturer
NUMONYX
Series
Forté™r
Datasheet

Specifications of M25P10-AVMN6TP

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
1M (128K x 8)
Speed
50MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Package
8SO N
Cell Type
NOR
Density
1 Mb
Architecture
Sectored
Block Organization
Symmetrical
Typical Operating Supply Voltage
3.3 V
Sector Size
256Byte x 512
Timing Type
Synchronous
Interface Type
Serial-SPI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
M25P10-AVMN6TPTR

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6.3
Read Identification (RDID)
The Read Identification (RDID) instruction is available in products with process technology
code X and Y.
The Read Identification (RDID) instruction allows the 8-bit manufacturer identification to be
read, followed by two bytes of device identification. The manufacturer identification is
assigned by JEDEC, and has the value 20h for Numonyx. The device identification is
assigned by the device manufacturer, and indicates the memory type in the first byte (20h),
and the memory capacity of the device in the second byte (11h).
Any Read Identification (RDID) instruction while an Erase or Program cycle is in progress, is
not decoded, and has no effect on the cycle that is in progress.
The Read Identification (RDID) instruction should not be issued while the device is in Deep
Power-down mode.
The device is first selected by driving Chip Select (S) Low. Then, the 8-bit instruction code
for the instruction is shifted in. This is followed by the 24-bit device identification, stored in
the memory, being shifted out on Serial Data output (Q), each bit being shifted out during the
falling edge of Serial Clock (C).
The instruction sequence is shown in
The Read Identification (RDID) instruction is terminated by driving Chip Select (S) High at
any time during data output.
When Chip Select (S) is driven High, the device is put in the Standby Power mode. Once in
the Standby Power mode, the device waits to be selected, so that it can receive, decode and
execute instructions.
Table 5.
Figure 9.
Manufacturer identification
S
C
D
Q
Read identification (RDID) data-out sequence
Read Identification (RDID) instruction sequence and data-out sequence
20h
0
High Impedance
1
2
Instruction
3 4 5 6 7 8 9 10 11 12 13 14 15
MSB
Manufacturer identification
Figure
Memory type
9.
20h
Device identification
MSB
15 14 13
16 17 18
Device identification
3 2 1 0
28 29 30 31
Memory capacity
AI06809b
11h
19/51

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