M25P05-AVMP6G NUMONYX, M25P05-AVMP6G Datasheet - Page 5

IC FLASH 512KBIT 50MHZ 8VFQFPN

M25P05-AVMP6G

Manufacturer Part Number
M25P05-AVMP6G
Description
IC FLASH 512KBIT 50MHZ 8VFQFPN
Manufacturer
NUMONYX
Series
Forté™r
Datasheet

Specifications of M25P05-AVMP6G

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
512K (64K x 8)
Speed
50MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-VFQFN, 8-VFQFPN
Memory Configuration
64K X 8
Ic Interface Type
Serial, SPI
Clock Frequency
50MHz
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
VDFPN
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M25P05-AVMP6G
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
M25P05-AVMP6G
Manufacturer:
ST
0
Part Number:
M25P05-AVMP6G
Manufacturer:
MICRON
Quantity:
20 000
M25P05-A
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Figure 29.
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
SO, VFQFPN and TSSOP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Bus master and memory devices on the SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
SPI modes supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Hold condition activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Write enable (WREN) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Write disable (WRDI) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Read identification (RDID) instruction sequence and data-out sequence . . . . . . . . . . . . . 21
Read status register (RDSR) instruction sequence and data-out sequence . . . . . . . . . . . 23
Write status register (WRSR) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Read data bytes (READ) instruction sequence and data-out sequence . . . . . . . . . . . . . . 26
Read data bytes at higher speed (FAST_READ) instruction sequence
and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Page program (PP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Sector erase (SE) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Bulk erase (BE) instruction sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Deep power-down (DP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Release from deep power-down and read electronic signature (RES)
Release from deep power-down (RES) instruction sequence . . . . . . . . . . . . . . . . . . . . . . 34
Power-up timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Serial input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Write protect setup and hold timing during WRSR when SRWD =1. . . . . . . . . . . . . . . . . . 43
Hold timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Output timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
SO8N – 8 lead plastic small outline, 150 mils body width, package outline . . . . . . . . . . . . 45
VFQFPN8 (MLP8) - 8 lead very thin fine pitch quad flat package no lead,
6 × 5 mm, package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
TSSOP8 – 8 lead thin shrink small outline, package outline . . . . . . . . . . . . . . . . . . . . . . . 47
UFDFPN8 (MLP8) – 8 lead ultra thin fine pitch dual flat package no lead,
2 x 3 mm package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
instruction sequence and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
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