M25P05-AVMN6TP NUMONYX, M25P05-AVMN6TP Datasheet - Page 20
M25P05-AVMN6TP
Manufacturer Part Number
M25P05-AVMN6TP
Description
IC FLASH 512KBIT 50MHZ 8SOIC
Manufacturer
NUMONYX
Series
Forté™r
Datasheet
1.M25P05-AVMN6P.pdf
(52 pages)
Specifications of M25P05-AVMN6TP
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
512K (64K x 8)
Speed
50MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Package
8SO N
Cell Type
NOR
Density
512 Kb
Architecture
Sectored
Block Organization
Symmetrical
Typical Operating Supply Voltage
3.3 V
Sector Size
256Byte x 256
Timing Type
Synchronous
Interface Type
Serial-SPI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
M25P05-AVM6TPTR
M25P05-AVMN6TP
M25P05-AVMN6TPTR
M25P05-AVMN6TP
M25P05-AVMN6TPTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M25P05-AVMN6TP
Manufacturer:
FREESCALE
Quantity:
110
Company:
Part Number:
M25P05-AVMN6TP
Manufacturer:
NUMONYX
Quantity:
2 350
Part Number:
M25P05-AVMN6TP
Manufacturer:
ST
Quantity:
20 000
Company:
Part Number:
M25P05-AVMN6TP(25P05VP)
Manufacturer:
TI
Quantity:
13
Instructions
6.2
20/52
Write disable (WRDI)
The write disable (WRDI) instruction
The write disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
The write enable latch (WEL) bit is reset under the following conditions:
Figure 8.
Power-up
Write disable (WRDI) instruction completion
Write status register (WRSR) instruction completion
Page program (PP) instruction completion
Sector erase (SE) instruction completion
Bulk erase (BE) instruction completion.
Write disable (WRDI) instruction sequence
S
C
D
Q
High Impedance
0
(Figure
1
2
Instruction
8) resets the write enable latch (WEL) bit.
3
4
5
6
7
AI03750D
M25P05-A