M45PE20-VMP6G NUMONYX, M45PE20-VMP6G Datasheet
M45PE20-VMP6G
Specifications of M45PE20-VMP6G
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M45PE20-VMP6G Summary of contents
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... Deep Power-down Mode 1 A (typical) Electronic Signature – JEDEC Standard Two-Byte Signature (4012h) More than 100,000 Write Cycles More than 20 Year Data Retention Packages – ECOPACK® (RoHS compliant) October 2005 Figure 1. Packages 8 1 SO8 (MN) 150 mil width VDFPN8 (MP) (MLP8) M45PE20 1/34 ...
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... M45PE20 TABLE OF CONTENTS FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 SUMMARY DESCRIPTION SIGNAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Serial Data Output ( Serial Data Input ( Serial Clock ( Chip Select ( Reset (Reset Write Protect ( SPI MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 OPERATING FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Sharing the Overhead of Modifying Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 An Easy Way to Modify Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 A Fast Way to Modify Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Polling During a Write, Program or Erase Cycle ...
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... POWER-UP AND POWER-DOWN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 INITIAL DELIVERY STATE MAXIMUM RATING AND AC PARAMETERS PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 REVISION HISTORY M45PE20 3/34 ...
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... M45PE20 SUMMARY DESCRIPTION The M45PE20 is a 2Mbit (256K x 8 bit) Serial Paged Flash Memory accessed by a high speed SPI-compatible bus. The memory can be written or programmed 1 to 256 bytes at a time, using the Page Write or Page Program instruction. The Page Write instruction consists of an integrated Page Erase cycle fol- lowed by a Page Program cycle ...
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... Hardware Protected mode, when Write Protect (W) is connected to V 256 pages of memory to become read-only by pro- tecting them from write, program and erase oper- ations. When Write Protect (W) is connected the first 256 pages of memory behave like CC the other pages of memory. M45PE20 , causing the first SS 5/34 ...
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... M45PE20 SPI MODES These devices can be driven by a microcontroller with its SPI peripheral running in either of the two following modes: – CPOL=0, CPHA=0 – CPOL=1, CPHA=1 For these two modes, input data is latched in on the rising edge of Serial Clock (C), and output data Figure 4 ...
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... All other instructions are ignored while the device is in the Deep Power-down mode. This can be used as an extra software protection mechanism, when the device is not in active use, to protect the device from inadvertent Write, Program or Erase instructions. M45PE20 and AC Characteristics , The Write ...
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... The environments where non-volatile memory de- vices are used can be very noisy. No SPI device can operate correctly in the presence of excessive noise. To help combat this, the M45PE20 features the following data protection mechanisms: Power On Reset and an internal timer (t can provide protection against inadvertant changes while the power supply is outside the operating specification ...
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... Table 3. Memory Organization Sector High Voltage Generator I/O Shift Register 256 Byte Data Buffer 10000h 00000h 256 Bytes (Page Size) X Decoder M45PE20 Address Range 30000h 3FFFFh 20000h 2FFFFh 10000h 1FFFFh 00000h 0FFFFh Status Register 3FFFFh First 256 Pages can be made read-only ...
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... M45PE20 INSTRUCTIONS All instructions, addresses and data are shifted in and out of the device, most significant bit first. Serial Data Input (D) is sampled on the first rising edge of Serial Clock (C) after Chip Select (S) is driven Low. Then, the one-byte instruction code must be shifted in to the device, most significant bit first, on Serial Data Input (D), each bit being latched on the rising edges of Serial Clock (C) ...
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... Chip Select (S) High Instruction High Impedance – Power-up (Figure 8.) – Write Disable (WRDI) instruction completion – Page Write (PW) instruction completion – Page Program (PP) instruction completion – Page Erase (PE) instruction completion – Sector Erase (SE) instruction completion Instruction High Impedance M45PE20 AI02281E AI03750D 11/34 ...
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... M45PE20 Read Identification (RDID) The Read Identification (RDID) instruction allows the 8-bit manufacturer identification to be read, fol- lowed by two bytes of device identification. The manufacturer identification is assigned by JEDEC, and has the value 20h for STMicroelectronics. The device identification is assigned by the device manufacturer, and indicates the memory type in the first byte (40h), and the memory capacity of the device in the second byte (12h) ...
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... Write Enable Latch. When set to 1 the internal Write Enable Latch is set, when set to 0 the internal Write Enable Latch 10.. is reset and no Write, Program or Erase instruction is accepted Status Register Out MSB Status Register Out MSB AI02031E M45PE20 13/34 ...
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... M45PE20 Read Data Bytes (READ) The device is first selected by driving Chip Select (S) Low. The instruction code for the Read Data Bytes (READ) instruction is followed by a 3-byte address (A23-A0), each bit being latched-in during the rising edge of Serial Clock (C). Then the mem- ...
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... High at any time during data output. Any Read Data Bytes at Higher Speed (FAST_READ) in- struction, while an Erase, Program or Write cycle Figure 12 progress, is rejected without having any ef- fects on the cycle that is in progress BIT ADDRESS DATA OUT MSB Read Data Bytes at Higher 47 DATA OUT MSB MSB M45PE20 Speed AI04006 15/34 ...
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... M45PE20 Page Write (PW) The Page Write (PW) instruction allows bytes to be written in the memory. Before it can be accept- ed, a Write Enable (WREN) instruction must previ- ously have been executed. After the Write Enable (WREN) instruction has been decoded, the device sets the Write Enable Latch (WEL). ...
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... Hardware Protected is not executed. Any Page Program (PP) instruction, while an Erase, Program or Write cycle is in progress, is re- jected without having any effects on the cycle that is in progress 24-Bit Address MSB Data Byte MSB operation)). Data Byte MSB Data Byte MSB AI04044 M45PE20 ) PP 17/34 ...
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... M45PE20 Page Erase (PE) The Page Erase (PE) instruction sets to 1 (FFh) all bits inside the chosen page. Before it can be ac- cepted, a Write Enable (WREN) instruction must previously have been executed. After the Write Enable (WREN) instruction has been decoded, the device sets the Write Enable Latch (WEL). ...
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... Hardware Protected is not executed. Any Sector Erase (SE) instruction, while an Erase, Program or Write cycle is in progress, is rejected Figure 16.. without having any effects on the cycle that is in progress Instruction 24 Bit Address 23 22 MSB M45PE20 ) is initiated. While the Sector Erase cy AI03751D 19/34 ...
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... M45PE20 Deep Power-down (DP) Executing the Deep Power-down (DP) instruction is the only way to put the device in the lowest con- sumption mode (the Deep Power-down mode). It can also be used as an extra software protection mechanism, while the device is not in active use, since in this mode, the device ignores all Write, Program and Erase instructions ...
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... Any Release from Deep Power-down (RDP) in- struction, while an Erase, Program or Write cycle Figure 18 progress, is rejected without having any ef- fects on the cycle that is in progress RDP Deep Power-down Mode M45PE20 , the device is put in the RDP Stand-by Mode AI06807 21/34 ...
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... M45PE20 POWER-UP AND POWER-DOWN At Power-up and Power-down, the device must not be selected (that is Chip Select (S) must follow the voltage applied until V CC correct value: – V (min) at Power-up, and then for a further CC delay of t VSL – Power-down SS Usually a simple pull-up resistor on Chip Select (S) can be used to ensure safe and proper Power-up and Power-down ...
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... JEDEC Std JESD22-A114A (C1=100 pF, R1=1500 , R2=500 ) Threshold WI Parameter this specification, is not implied. Exposure to Ab- solute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Parameter 2 M45PE20 Min. Max. Unit 30 µ 1.5 2.5 V Min ...
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... M45PE20 DC AND AC PARAMETERS This section summarizes the operating and mea- surement conditions, and the DC and AC charac- teristics of the device. The parameters in the DC and AC Characteristic tables that follow are de- rived from tests performed under the Measure- Table 8. Operating Conditions Symbol V Supply Voltage ...
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... IH V Output Low Voltage OL V Output High Voltage OH Test Condition (in addition to those in Table 0.1V / 0.9 MHz open 0.1V / 0.9 MHz open 1 –100 A OH M45PE20 Min. Max. Unit 8.) ± 2 ± 0.3V – 0.5 CC 0. 0.4 V –0.2 CC 25/34 µA µA µA µ ...
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... M45PE20 Table 12. AC Characteristics (25MHz operation) Test conditions specified in Symbol Alt. Clock Frequency for the following instructions: FAST_READ, PW, PP PE, SE, DP, RDP, WREN, WRDI, RDSR Clock Frequency for READ f R instructions 1 t Clock High Time t CLH Clock Low Time t CLL CL Clock Slew Rate ...
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... When using PP and PW instructions to update consecutive Bytes, optimized timings are obtained with one sequence including all the Bytes versus several sequences of only a few Bytes 256) 4. Details of how to find the date of marking are given in Application Note, AN1995. Table 8. and Parameter Min. D.C. D. 0.03 (peak to peak 200 0 50 100 C M45PE20 (4) Table 9. Typ. Max. Unit 33 MHz 20 MHz ...
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... M45PE20 Figure 21. Serial Input Timing S tCHSL C tDVCH D High Impedance Q Figure 22. Write Protect Setup and Hold Timing W tWHSL High Impedance Q 28/34 tSLCH tCHSH tCHDX tCLCH MSB IN tSHSL tSHCH tCHCL LSB IN AI01447C tSHWL AI07439 ...
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... Figure 23. Output Timing S C tCLQV tCLQX tCLQX Q ADDR.LSB IN D Figure 24. Reset AC Waveforms S Reset tCH tCLQV tSHRH tRHSL tRLRH M45PE20 tCL tSHQZ LSB OUT tQLQH tQHQL AI01449D AI06808 29/34 ...
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... M45PE20 PACKAGE MECHANICAL Figure 25. SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, Package Outline SO-a Note: Drawing is not to scale. Table 14. SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, Package Mechanical Data Symb. Typ 1. 30/ Min. ...
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... M45PE20 VDFPN-01 inches Min. Max. 0.0394 0.0000 0.0020 0.0138 0.0189 0.1260 0.1417 0.1496 0.1654 0.0197 0.0295 12° 31/34 ...
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... For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest ST Sales Of- fice. 32/34 M45PE20 – The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...
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... Scheme. Ecopack® information added. Description of Revision (min) extended to –0.6V, t (typ) and Characteristics (33MHz operation). Data, Page Write (PW) Table 11., DC Characteristics. Updated (typ) improved. Table of contents, warning PP An Easy Way to Modify Data, and Page Program (PP) sections updated to Table 16., Ordering Information M45PE20 A Fast CC3 33/34 ...
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... M45PE20 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...