CY7C148-35PC Cypress Semiconductor Corp, CY7C148-35PC Datasheet

no-image

CY7C148-35PC

Manufacturer Part Number
CY7C148-35PC
Description
1KX4 18-PIN POWER-DOWN SRAM
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C148-35PC

Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
4K (1K x 4)
Speed
35ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
18-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS compliant by exemption

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C148-35PC
Manufacturer:
CYPRESS
Quantity:
6 270
Part Number:
CY7C148-35PC
Quantity:
200
Features
Cypress Semiconductor Corporation
Document #: 38-05059 Rev. *B
Automatic power-down when deselected
CMOS for optimum speed/power
35-ns access time
Low active power
Low standby power (7C148)
5-volt power supply  10% tolerance, both commercial and
military
TTL-compatible inputs and outputs
Logic Block Diagram
440 mW
55 mW (all others)
A
A
A
A
A
A
9
8
7
6
5
4
198 Champion Court
A
INPUTBUFFER
3
DECODER
COLUMN
A
64 x 64
ARRAY
2
A
1
A
0
POWER
(7C148)
DOWN
Functional Description
The CY7C148 is a high-performance CMOS static RAMs
organized as 1024 by 4 bits. Easy memory expansion is provided
by an active LOW chip select (CS) input and three-state outputs.
The CY7C148 remains in a low-power mode as long as the
device remains unselected; i.e., (CS) is HIGH, thus reducing the
average power requirements of the device.
Writing to the device is accomplished when the chip select (CS)
and write enable (WE) inputs are both LOW. Data on the I/O pins
(I/O
specified on the address pins (A
Reading the device is accomplished by taking chip select (CS)
LOW while write enable (WE) remains HIGH. Under these
conditions, the contents of the location specified on the
address pins will appear on the four data I/O pins.
The I/O pins remain in a high-impedance state when chip select
(CS) is HIGH or write enable (WE) is LOW.
0
through I/O
San Jose
3
) is written into the memory locations
,
CA 95134-1709
I/O
I/O
I/O
I/O
CS
WE
0
1
2
3
1Kx4 Static RAM
0
through A
Revised October 7, 2010
9
).
CY7C148
408-943-2600
[+] Feedback

Related parts for CY7C148-35PC

CY7C148-35PC Summary of contents

Page 1

... The CY7C148 is a high-performance CMOS static RAMs organized as 1024 by 4 bits. Easy memory expansion is provided by an active LOW chip select (CS) input and three-state outputs. The CY7C148 remains in a low-power mode as long as the device remains unselected; i.e., (CS) is HIGH, thus reducing the average power requirements of the device. ...

Page 2

... Pin Configuration GND 9 Selection Guide Description Maximum Access Time (ns) Maximum Operating Current (mA) Maximum Standby Current (mA) Document #: 38-05059 Rev. *B DIP Top View 7C14835 35 Commercial 80 Commercial 10 CY7C148 Page [+] Feedback ...

Page 3

... IL Output Open Max > V 7C148 Only CC IH Max > V 7C148 Only CC IH Test Conditions T = 25 MHz 5.0V CC power-up. Otherwise current will exceed values given (CY7C148 CC CY7C148 Ambient Temperature V CC   5V  10 +70 C 7C14835 Unit Min. Max. 2 ...

Page 4

... Document #: 38-05059 Rev. *B R1481 3. GND 255 JIG AND SCOPE (b) 1.73V [1] Description for all devices. Transition is measured 500 mV from steady-state is less than CY7C148 ALL INPUT PULSES 90% 90% 10% 10% < < 7C14835 Unit Min. Max ...

Page 5

... DATA OUT DATA UNDEFINED Notes HIGH for read cycle. 9. Device is continuously selected 10. Address valid prior to or coincident with CS transition LOW. Document #: 38-05059 Rev DATA VALID 50 DATA–IN VALID t WZ CY7C148 DATA VALID t HZ HIGH IMPEDANCE t PD ICC 50% ISB HIGH IMPEDANCE Page [+] Feedback ...

Page 6

... Switching Waveforms (continued) [11] Write Cycle No. 2 (CSControlled) ADDRESS CS WE DATA IN DATA OUT DATA UNDEFINED Note: 11 goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. Document #: 38-05059 Rev DATA VALID HIGH IMPEDANCE CY7C148 Page [+] Feedback ...

Page 7

... AMBIENT TEMPERATURE(°C) NORMALIZED ACCESS TIME vs.AMBIENT TEMPERATURE 1.6 1.4 1.2 1.0 V =5.0V CC 0.8 0.6  125 AMBIENT TEMPERATURE(°C) CY7C148 OUTPUT SOURCE CURRENT vs.OUTPUT VOLTAGE 120 100 80 V =5. =25° 0.0 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE(V) OUTPUT SINK CURRENT vs ...

Page 8

... Molded DIP Temperature Range Commercial Package Type: P: 18-Lead Molded DIP Access time 4-Kbit density with Data width × 4 bits 1 = Fast Asynchronous SRAM family Technology Code CMOS 7 = SRAM CY = Cypress CY7C148 NORMALIZED I vs.ACCESS TIME CC 1.4 1.3 1.2 1.1 1.0 0.9 0.8 ...

Page 9

... Figure 1. 18-Lead (300-Mil) Molded DIP P3 Document #: 38-05059 Rev. *B CY7C148 51-85010 *C Page [+] Feedback ...

Page 10

... Document History Page Document Title: CY7C148 Static RAM Document Number: 38-05059 Orig. of Rev. ECN No. Issue Date Change ** 110170 09/29/01 *A 2894016 03/19/2010 *B 3051744 10/07/2010 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office ...

Related keywords