CY7C148-35PC Cypress Semiconductor Corp, CY7C148-35PC Datasheet - Page 4

• Manufacturer Part Number: CY7C148-35PC
• Description: 1KX4 18-PIN POWER-DOWN SRAM
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C148-35PC

• Format - Memory: RAM
• Memory Type: SRAM - Asynchronous
• Memory Size: 4K (1K x 4)
• Speed: 35ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS compliant by exemption

AC Test Loads and Waveforms
Switching Characteristics
Document #: 38-05059 Rev. *B
Equivalent to:
OUTPUT
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Notes:
Parameter
RC
AA
ACS1
ACS2
LZ
HZ
OH
PD
PU
WC
WP
WR
WZ
DW
DH
AS
CW
OW
AW
4. Chip deselected greater than 25 ns prior to selection.
5. Chip deselected less than 25 ns prior to selection.
6. At any given temperature and voltage condition, t
7. The internal write time of the memory is defined by the overlap of CS LOW and WE LOW. Both signals must be LOW to initiate a write
READ CYCLE
WRITE CYCLE
[6]
[6]
[6]
[7]
voltage with specified loading in part (b) of AC Test Loads.
and either signal can terminate a write by going high. The data input set-up and hold timing should be referenced to the rising edge of
the signal that terminates the write.
[7]
[6]
INCLUDING
5V
JIG AND
SCOPE
30 pF
Address Valid to Address Do Not Care Time (Read Cycle Time)
Address Valid to Data Out Valid Delay (Address Access Time)
Chip Select LOW to Data Out Valid
Chip Select LOW to Data Out On
Chip Select HIGH to Data Out Off
Address Unknown to Data Out Unknown Time
Chip Select HIGH to Power-Down Delay
Chip Select LOW to Power-Up Delay
Address Valid to Address Do Not Care
(Write Cycle Time)
Write Enable LOW to Write Enable HIGH
Address Hold from Write End
Write Enable to Output in High Z
Data in Valid to Write Enable HIGH
Data Hold Time
Address Valid to Write Enable LOW
Chip Select LOW to Write Enable HIGH
Write Enable HIGH to Output in Low Z
Address Valid to End of Write
OUTPUT
THÉ VENIN EQUIVALENT
R1481
(a)
R2
255
167
OUTPUT
Over the Operating Range
INCLUDING
5V
Description
JIG AND
SCOPE
HZ
5 pF
is less than t
1.73V
R1481
(b)
LZ
for all devices. Transition is measured 500 mV from steady-state
R2
255
[1]
GND
3.0V
< 10 ns
Min.
35
10
35
30
20
30
30
0
0
0
5
0
0
0
0
7C14835
Max.
10%
ALL INPUT PULSES
35
35
35
20
30
8
90%
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
90%
CY7C148
10%
< 10 ns
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