IDT70T3519S166BC IDT, Integrated Device Technology Inc, IDT70T3519S166BC Datasheet - Page 18
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IDT70T3519S166BC
Manufacturer Part Number
IDT70T3519S166BC
Description
IC SRAM 9MBIT 166MHZ 256BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT70T3519S133BFGI.pdf
(28 pages)
Specifications of IDT70T3519S166BC
Format - Memory
RAM
Memory Type
SRAM - Dual Port, Synchronous
Memory Size
9M (256K x 36)
Speed
166MHz
Interface
Parallel
Voltage - Supply
2.4 V ~ 2.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
70T3519S166BC
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IDT70T3519S166BC
Manufacturer:
IDT
Quantity:
173
Company:
Part Number:
IDT70T3519S166BC
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Company:
Part Number:
IDT70T3519S166BC8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Company:
Part Number:
IDT70T3519S166BCI
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Company:
Part Number:
IDT70T3519S166BCI8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Timing Waveform of Pipelined Read with Address Counter Advance
Timing Waveform of Flow-Through Read with Address Counter Advance
NOTES:
1. CE
2. If there is no address change via ADS = V
IDT70T3519/99/89S
High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM
the data output remains constant for subsequent clocks.
ADDRESS
DATA
0
, OE, BEn = V
ADDRESS
CNTEN
DATA
CNTEN
CLK
ADS
OUT
CLK
ADS
OUT
IL
; CE
Qx - 1
Qx
t
t
SAD
SA
EXTERNAL
(2)
ADDRESS
1
t
t
, R/W, and REPEAT = V
An
SA
SAD
(2)
READ
EXTERNAL
ADDRESS
t
An
t
HAD
HA
t
READ
t
DC
t
t
CH1
HAD
HA
t
CH2
t
t
CD1
CYC1
t
CYC2
t
CL1
IL
t
CL2
(loading a new address) or CNTEN = V
Qx
Qn
IH
.
t
CD2
t
READ WITH COUNTER
DC
READ WITH COUNTER
Qn
Qn + 1
6.42
18
IL
Qn + 1
t
t
SCN
(advancing the address), i.e. ADS = V
SAD
Qn + 2
t
t
HCN
HAD
COUNTER
HOLD
Industrial and Commercial Temperature Ranges
t
t
SCN
SAD
t
t
HCN
HAD
COUNTER
Qn + 2
Qn + 3
HOLD
(2)
(2)
COUNTER
IH
READ
WITH
and CNTEN = V
COUNTER
READ
WITH
5666 drw 16
5666 drw 15
IH
Qn + 4
, then
Qn + 3
(1)
(1)