AT24C64C-TH-T Atmel, AT24C64C-TH-T Datasheet

IC EEPROM 64KBIT 1MHZ 8TSSOP

AT24C64C-TH-T

Manufacturer Part Number
AT24C64C-TH-T
Description
IC EEPROM 64KBIT 1MHZ 8TSSOP
Manufacturer
Atmel
Datasheet

Specifications of AT24C64C-TH-T

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
64K (8K x 8)
Speed
400kHz, 1MHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AT24C64C-TH-TTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT24C64C-TH-T
Manufacturer:
ATMEL
Quantity:
8 000
Part Number:
AT24C64C-TH-T
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT24C64C-TH-T
Quantity:
14 000
(Features
Description
The AT24C32C/64C provides 32,768/65,536 bits of serial electrically erasable and
programmable read only memory (EEPROM) organized as 4096/8192 words of 8 bits
each. The device’s cascadable feature allows up to 8 devices to share a common 2-
wire bus. The device is optimized for use in many industrial and commercial applica-
tions where low power and low voltage operation are essential. The AT24C32C/64C is
available in space saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Lead Frame
Land Grid Array (ULA), 8-lead TSSOP, 8-lead Ultra Thin Mini-MAP (MLP2x3) and, 8-
ball dBGA2 packages and is accessed via a 2-wire serial interface. In addition, the
entire family is available in 1.8V (1.8 to 5.5V) version.
Pin Configurations
Pin Name
A0 - A2
SDA
SCL
WP
Low-voltage and Standard-voltage Operation
Internally Organized 4096 x 8, 8192 x 8
2-Wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bi-directional Data Transfer Protocol
1 MHz (5.0V) and 400 KHz (1.8V Compatibility)
Write Protect Pin for Hardware Data Protection
32-Byte Page Write Mode (Partial Page Writes Allowed)
Self-Timed Write Cycle (5 ms max)
High Reliability
Lead-free/Halogen-free Devices
8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Lead Frame Land Grid Array (ULA), 8-lead
TSSOP, 8-lead Ultra Thin Mini-MAP (MLP2x3), and 8-ball dBGA2 Packages.
Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers
– 1.8 (V
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
CC
= 1.8 to 5.5V)
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
GND
A0
A1
A2
Mini-MAP (MLP 2x3)
VCC
SDA
SCL
VCC
SDA
SCL
WP
WP
8-lead Ultra Thin
8-ball dBGA2
8-lead SOIC
Bottom View
Bottom View
1
2
3
4
8
7
6
5
8
7
6
5
1
2
3
4
1
2
3
4
8
7
6
5
A0
A1
A2
GND
A0
A1
A2
GND
VCC
WP
SCL
SDA
GND
8-lead Ultra Lead Frame
GND
Land Grid Array (ULA)
A0
A1
A2
VCC
SDA
SCL
A0
A1
A2
WP
8-lead TSSOP
Bottom View
8
7
6
5
8-lead PDIP
1
2
3
4
1
2
3
4
1
2
3
4
8
7
6
5
8
7
6
5
A0
A1
A2
GND
VCC
WP
SCL
SDA
VCC
WP
SCL
SDA
2-Wire
Serial EEPROM
32K (4096 x 8)
64K (8192 x 8)
AT24C32C
AT24C64C
Not Recommended
for New Design
5298A–SEEPR–1/08

Related parts for AT24C64C-TH-T

AT24C64C-TH-T Summary of contents

Page 1

... A2 SCL GND SDA GND 4 Bottom View 8-lead PDIP 8-lead SOIC VCC SCL SDA GND 4 2-Wire Serial EEPROM 32K (4096 x 8) 64K (8192 x 8) AT24C32C AT24C64C Not Recommended for New Design GND 8 VCC SCL 5 SDA 8 VCC SCL 5 SDA 5298A–SEEPR–1/08 ...

Page 2

Absolute Maximum Ratings* Operating Temperature ..................................... -55 to +125°C Storage Temperature......................................... -65 to +150°C Voltage on Any Pin with Respect to Ground ....................................... -1.0 to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5 Block Diagram VCC ...

Page 3

... If the pin is left floating, the WP pin will be internally pulled down to GND if the capacitive cou- pling to the circuit board V the pin to GND. 5298A–SEEPR–1/08 plane is <3pF. If coupling is >3pF, Atmel CC , all write operations to the memory are inhibited. CC plane is <3pF. If coupling is >3pF, Atmel recommends connecting CC AT24C32C/64C ® recommends 3 ...

Page 4

... Memory Organization AT24C32C/64C, 32/64K SERIAL EEPROM: The 32K/64K is internally organized as 128/256 pages of 32 bytes each. Random word addressing requires a 12/13 bit data word address. Pin Capacitance (1) Applicable over recommended operating range from T Symbol Test Condition C Input/Output Capacitance (SDA) I/O C Input Capacitance (A ...

Page 5

AC Characteristics Applicable over recommended operating range from T 100 pF (unless otherwise noted) Symbol Parameter f Clock Frequency, SCL SCL t Clock Pulse Width Low LOW t Clock Pulse Width High HIGH t Noise Suppression Time i t Clock ...

Page 6

Device Operation CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods (refer to Data Valid- ity timing diagram). Data changes ...

Page 7

Bus Timing SCL: Serial Clock, SDA: Serial Data I/O SCL t SU.STA SDA IN SDA OUT 6. Write Cycle Timing SCL: Serial Clock, SDA: Serial Data I/O SCL SDA 8th BIT WORDn Note: 1. The write cycle time t ...

Page 8

Data Validity SDA SCL 8. Start and Stop Definition SDA SCL 9. Output Acknowledge SCL DATA IN DATA OUT AT24C32C/64C 8 DATA STABLE DATA STABLE DATA CHANGE START 1 START STOP 8 9 ACKNOWLEDGE 5298A–SEEPR–1/08 ...

Page 9

... The data word address lower 5 bits are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. When the word address, internally generated, reaches the page boundary, the follow- ing byte is placed at the beginning of the same page. If more than 32 data words are transmitted to the EEPROM, the data word address will “ ...

Page 10

... The address “roll over” during read is from the last byte of the last memory page, to the first byte of the first page. The address “roll over” during write is from the last byte of the current page to the first byte of the same page ...

Page 11

Figure 12-3. Page Write Note DON’T CARE bits DON’T CARE bit for AT24C32C Figure 12-4. Current Address Read Figure 12-5. Random Read Note DON’T CARE bits 5298A–SEEPR–1/08 t AT24C32C/64C 11 ...

Page 12

Figure 12-6. Sequential Read AT24C32C/64C 12 5298A–SEEPR–1/08 ...

Page 13

AT24C32C Ordering Information Ordering Code AT24C32C-PU (Bulk form only) (1) AT24C32CN-SH-B (NiPdAu Lead Finish) (2) AT24C32CN-SH-T (NiPdAu Lead Finish) (1) AT24C32C-TH-B (NiPdAu Lead Finish) (2) AT24C32C-TH-T (NiPdAu Lead Finish) (2) AT24C32CY6-YH-T (NiPdAu Lead Finish) (2) AT24C32CD3-DH-T (NiPdAu Lead Finish) (2) ...

Page 14

... AT24C64C Ordering Information Ordering Code AT24C64C-PU (Bulk form only) (1) AT24C64CN-SH-B (NiPdAu Lead Finish) (2) AT24C64CN-SH-T (NiPdAu Lead Finish) (1) AT24C64C-TH-B (NiPdAu Lead Finish) (2) AT24C64C-TH-T (NiPdAu Lead Finish) (2) AT24C64CY6-YH-T (NiPdAu Lead Finish) (2) AT24C64CD3-DH-T (NiPdAu Lead Finish) (2) AT24C64CU2-UU-T (3) AT24C64C-W-11 Notes: 1. “-B” denotes Bulk. 2. “-T” denotes tape and reel. SOIC = 4K per reel. TSSOP, Ultra Thin Mini-MAP and dBGA2 = 5K per reel. ...

Page 15

Part Marking Scheme 13.1 8-PDIP TOP MARK Seal Year |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| * Lot Number |---|---|---|---|---|---|---|---| | Pin 1 Indicator (Dot) 13.2 8-SOIC TOP MARK |---|---|---|---|---|---|---|---| ...

Page 16

... Pin 1 Indicator (Dot) AT24C32C/64C SEAL YEAR 6: 2006 7: 2007 W 8: 2008 9: 2009 YEAR OF ASSEMBLY XX = ATMEL LOT NUMBER TO COORESPOND WITH NSEB TRACE CODE LOG BOOK. (e. AA, AB, AC,...AX, AY, AZ SEAL YEAR 6: 2006 7: 2007 8: 2008 9: 2009 WW = SEAL WEEK 0: 2010 02 = Week 2 1: 2011 04 = Week 4 2: 2012 ...

Page 17

... TOP MARK |---|---|---| |---|---|---| |---|---|---| * | Pin 1 Indicator (Dot) 5298A–SEEPR–1/08 AT24C32C/64C Y = YEAR OF ASSEMBLY XX = ATMEL LOT NUMBER TO COORESPOND WITH NSEB TRACE CODE LOG BOOK. (e. AA, AB, AC,...AX, AY, AZ BUILD YEAR 6: 2006 7: 2007 8: 2008 Etc... 17 ...

Page 18

Part Marking Scheme 14.1 8-PDIP TOP MARK Seal Year | | |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| * Lot Number |---|---|---|---|---|---|---|---| | Pin 1 Indicator (Dot) 14.2 8-SOIC TOP MARK |---|---|---|---|---|---|---|---| A T ...

Page 19

... Pin 1 Indicator (Dot) 5298A–SEEPR–1/ SEAL YEAR 6: 2006 7: 2007 W 8: 2008 9: 2009 YEAR OF ASSEMBLY XX = ATMEL LOT NUMBER TO COORESPOND WITH NSEB TRACE CODE LOG BOOK. (e. AA, AB, AC,...AX, AY, AZ SEAL YEAR 6: 2006 7: 2007 8: 2008 9: 2009 AT24C32C/64C WW = SEAL WEEK 0: 2010 02 = Week 2 1: 2011 ...

Page 20

... TOP MARK |---|---|---| |---|---|---| |---|---|---| * | Pin 1 Indicator (Dot) AT24C32C/64C YEAR OF ASSEMBLY XX = ATMEL LOT NUMBER TO COORESPOND WITH NSEB TRACE CODE LOG BOOK. (e. AA, AB, AC,...AX, AY, AZ BUILD YEAR 6: 2006 7: 2007 8: 2008 Etc... 5298A–SEEPR–1/08 ...

Page 21

Packaging Information 8Y6 - MLP D Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-229, for proper dimensions, tolerances, datums, etc. 2. Dimension b applies to metallized terminal and is measured between 0.15 mm ...

Page 22

PDIP Top View PLCS Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information. 2. Dimensions A and L are measured with the ...

Page 23

JEDEC SOIC TOP VIEW e e SIDE VIEW Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 ...

Page 24

TSSOP Pin 1 indicator this corner N Top View Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, ...

Page 25

A1 BALL PAD CORNER e (e1) 5. Dimension 'b' is measured at the maximum solder ball diameter. This drawing is for general information only. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R 5298A–SEEPR–1/ ...

Page 26

ULA PIN # TOP VIEW 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT24C32C/64C SIDE VIEW SYMBOL ...

Page 27

Revision History Doc. Rev. 5298A 5298A–SEEPR–1/08 Date Comments AT24C32C/64C product with date code 2008 work week 14 (814) or later supports 5Vcc operation 1/2008 Initial document release AT24C32C/64C 27 ...

Page 28

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

Related keywords