SST25VF040B-80-4I-S2AE Microchip Technology, SST25VF040B-80-4I-S2AE Datasheet - Page 18

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SST25VF040B-80-4I-S2AE

Manufacturer Part Number
SST25VF040B-80-4I-S2AE
Description
IC FLASH SER 4MB 80MHZ SPI 8SOIC
Manufacturer
Microchip Technology

Specifications of SST25VF040B-80-4I-S2AE

Memory Type
FLASH
Memory Size
4M (512K x 8)
Format - Memory
FLASH
Speed
80MHz
Interface
SPI Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Ic Interface Type
SPI
Clock Frequency
80MHz
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
SOIC
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SST25VF040B-80-4I-S2AE
Manufacturer:
HARVATEK
Quantity:
30 000
Part Number:
SST25VF040B-80-4I-S2AE
Manufacturer:
SST
Quantity:
20 000
Data Sheet
Write-Disable (WRDI)
The Write-Disable (WRDI) instruction resets the Write-
Enable-Latch bit and AAI bit to 0 disabling any new Write
operations from occurring. The WRDI instruction will not
Enable-Write-Status-Register (EWSR)
The Enable-Write-Status-Register (EWSR) instruction
arms the Write-Status-Register (WRSR) instruction and
opens the status register for alteration. The Write-Status-
Register instruction must be executed immediately after the
execution of the Enable-Write-Status-Register instruction.
This two-step instruction sequence of the EWSR instruc-
tion followed by the WRSR instruction works like SDP (soft-
ware data protection) command structure which prevents
any accidental alteration of the status register values. CE#
must be driven low before the EWSR instruction is entered
and must be driven high before the EWSR instruction is
executed.
©2009 Silicon Storage Technology, Inc.
FIGURE 17: Write Enable (WREN) Sequence
FIGURE 18: Write Disable (WRDI) Sequence
SCK
CE#
SCK
CE#
SO
SO
SI
SI
MODE 3
MODE 0
MODE 3
MODE 0
HIGH IMPEDANCE
HIGH IMPEDANCE
MSB
0 1 2 3 4 5 6 7
MSB
0 1 2 3 4 5 6 7
18
terminate any programming operation in progress. Any pro-
gram operation in progress may continue up to T
executing the WRDI instruction. CE# must be driven high
before the WRDI instruction is executed.
04
06
1295 WRDI.0
1295 WREN.0
4 Mbit SPI Serial Flash
SST25VF040B
S71295-05-000
BP
after
10/09

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