SST25VF080B-80-4I-S2AE Microchip Technology, SST25VF080B-80-4I-S2AE Datasheet - Page 17

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SST25VF080B-80-4I-S2AE

Manufacturer Part Number
SST25VF080B-80-4I-S2AE
Description
IC FLASH SER 8MB 80MHZ SPI 8SOIC
Manufacturer
Microchip Technology

Specifications of SST25VF080B-80-4I-S2AE

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
8M (1M x 8)
Speed
80MHz
Interface
SPI Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
A Microchip Technology Company
©2011 Silicon Storage Technology, Inc.
32-KByte and 64-KByte Block-Erase
The 32-KByte Block-Erase instruction clears all bits in the selected 32 KByte block to FFH. A Block-
Erase instruction applied to a protected memory area will be ignored. The 64-KByte Block-Erase instruc-
tion clears all bits in the selected 64 KByte block to FFH. A Block-Erase instruction applied to a protected mem-
ory area will be ignored. Prior to any Write operation, the Write-Enable (WREN) instruction must be executed.
CE# must remain active low for the duration of any command sequence. The 32-KByte Block-Erase
instruction is initiated by executing an 8-bit command, 52H, followed by address bits [A
bits [A
address bits can be V
Erase instruction is initiated by executing an 8-bit command D8H, followed by address bits [A
[A
driven high before the instruction is executed. The user may poll the Busy bit in the software status register or
wait T
cycles. See Figures 13 and 14 for the 32-KByte Block-Erase and 64-KByte Block-Erase sequences.
Figure 13:32-KByte Block-Erase Sequence
Figure 14:64-KByte Block-Erase Sequence
MS
-A
BE
MS
15
] are used to determine block address (BA
-A
for the completion of the internal self-timed 32-KByte Block-Erase or 64-KByte Block-Erase
15
] (A
MS
= Most Significant Address) are used to determine block address (BA
IL
or V
SCK
SCK
CE#
CE#
SO
SO
SI
SI
IH.
MODE 3
MODE 0
MODE 3
MODE 0
CE# must be driven high before the instruction is executed. The 64-KByte Block-
MSB
MSB
0 1 2 3 4 5 6 7 8
0 1 2 3 4 5 6 7 8
17
D8
52
HIGH IMPEDANCE
HIGH IMPEDANCE
X
), remaining address bits can be V
MSB
MSB
ADDR
ADDR
8 Mbit SPI Serial Flash
15 16
15 16
ADDR
ADDR
23 24
23 24
1296 32KBklEr.0
ADDR
ADDR
1296 63KBlkEr.0
31
31
SST25VF080B
IL
or V
23
S71296-05-000
-A
23
IH.
0
-A
X
]. Address bits
CE# must be
), remaining
Data Sheet
0
]. Address
02/11

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