AT27C020-70JC Atmel, AT27C020-70JC Datasheet - Page 2

• Manufacturer Part Number: AT27C020-70JC
• Description: IC OTP 2MBIT 70NS 32PLCC
• Manufacturer: Atmel

Specifications of AT27C020-70JC

• Format - Memory: EPROMs
• Memory Type: OTP EPROM
• Memory Size: 2M (256K x 8)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 32-PLCC
• Density: 2Mb
• Organization: 256Kx8
• Interface Type: Parallel
• Bus Type: Parallel
• In System Programmable: External
• Access Time (max): 70ns
• Package Type: PLCC
• Reprogramming Technique: OTP
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Supply Current: 25mA
• Pin Count: 32
• Mounting: Surface Mount
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

The AT27C020 is available in a choice of industry standard
JEDEC-approved one-time programmable (OTP) plastic
PDIP, PLCC, and TSOP packages. All devices feature two-
line control (CE, OE) to give designers the flexibility to pre-
vent bus contention.
With 256K byte storage capability, the AT27C020 allows
firmware to be stored reliably and to be accessed by the
system without the delays of mass storage media.
Atmel’s 27C020 have additional features to ensure high
quality and efficient production use. The Rapid
ming Algorithm reduces the time required to program the
part and guarantees reliable programming. Programming
time is typically only 100 s/byte. The Integrated Product
Identification Code electronically identifies the device and
manufacturer. This feature is used by industry standard
programming equipment to select the proper programming
algorithms and voltages.
Block Diagram
2
AT27C020
™
Program-
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excursions.
Unless accommodated by the system design, these tran-
sients may exceed data sheet limits, resulting in device
non-conformance. At a minimum, a 0.1 F high frequency,
low inherent inductance, ceramic capacitor should be uti-
lized for each device. This capacitor should be connected
between the V
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7 F bulk electrolytic capacitor should
be utilized, again connected between the V
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
CC
and Ground terminals of the device, as
CC
and Ground