AT29LV1024-20JI Atmel, AT29LV1024-20JI Datasheet - Page 2

• Manufacturer Part Number: AT29LV1024-20JI
• Description: IC FLASH 1MBIT 200NS 44PLCC
• Manufacturer: Atmel

Specifications of AT29LV1024-20JI

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 1M (64K x 16)
• Speed: 200ns
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: AT29LV102420JI

such that any sector can typically be written to in excess of
10,000 times.
To allow for simple in-system reprogrammability, the
AT29LV1024 does not require high input voltages for pro-
gramming. Three-volt-only commands determine the oper-
ation of the device. Reading data out of the device is similar
t o r e a d i n g f r o m a n E P R O M . R e p r o g r a m m i n g t h e
AT29LV1024 is performed on a sector basis; 128 words of
data are loaded into the device and then simultaneously
programmed.
Block Diagram
Device Operation
READ: The AT29LV1024 is accessed like an EPROM.
When CE and OE are low and WE is high, the data stored
at the memory location determined by the address pins is
asserted on the outputs. The outputs are put in the high
impedance state whenever CE or OE is high. This dual-line
control gives designers flexibility in preventing bus conten-
tion.
SOFTWARE DATA PROTECTION PROGRAMMING: The
AT29LV1024 has 512 individual sectors, each 128 words.
Using the software data protection feature, word loads are
used to enter the 128 words of a sector to be programmed.
The AT29LV1024 can only be programmed or repro-
grammed using the software data protection feature. The
device is programmed on a sector basis. If a word of data
within the sector is to be changed, data for the entire 128
wo r d s e c t or m us t be l oa d ed i nt o t he de v i c e. T h e
AT29LV1024 automatically does a sector erase prior to
loading the data into the sector. An erase command is not
required.
Software data protection protects the device from inadvert-
ent programming. A series of three program commands to
specific addresses with specific data must be presented to
the device before programming may occur. The same three
program commands must begin each program operation.
All software program commands must obey the sector pro-
gram timing specifications. Power transitions will not reset
the software data protection feature, however the software
2
AT29LV1024
During a reprogram cycle, the address locations and 128
words of data are internally latched, freeing the address
and data bus for other operations. Following the initiation of
a program cycle, the device will automatically erase the
sector and then program the latched data using an internal
control timer. The end of a program cycle can be detected
by DATA polling of I/O7 or I/O15. Once the end of a pro-
gram cycle has been detected, a new access for a read or
program can begin.
feature will guard against inadvertent program cycles dur-
ing power transitions.
Any attempt to write to the device without the 3-word com-
mand sequence will start the internal write timers. No data
will be written to the device; however, for the duration of
t
After the software data protection’s 3-word command code
is given, a word load is performed by applying a low pulse
on the WE or CE input with CE or WE low (respectively)
and OE high. The address is latched on the falling edge of
CE or WE, whichever occurs last. The data is latched by
the first rising edge of CE or WE.
The 128 words of data must be loaded into each sector.
Any word that is not loaded during the programming of its
sector will be erased to read FFFFH. Once the words of a
sector are loaded into the device, they are simultaneously
programmed during the internal programming period. After
the first data word has been loaded into the device, succes-
sive words are entered in the same manner. Each new
word to be programmed must have its high to low transition
on WE (or CE) within 150 µ s of the low to high transition of
WE (or CE) of the preceding word. If a high to low transition
is not detected within 150 µ s of the last low to high transi-
tion, the load period will end and the internal programming
period will start. A7 to A15 specify the sector address. The
sector address must be valid during each high to low transi-
WC
, a read operation will effectively be a polling operation.