AT34C02-10TU-1.8 SL383 Atmel, AT34C02-10TU-1.8 SL383 Datasheet

IC EEPROM 2KBIT 400KHZ 8TSSOP

AT34C02-10TU-1.8 SL383

Manufacturer Part Number
AT34C02-10TU-1.8 SL383
Description
IC EEPROM 2KBIT 400KHZ 8TSSOP
Manufacturer
Atmel
Datasheet

Specifications of AT34C02-10TU-1.8 SL383

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
2K (256 x 8)
Speed
100kHz, 400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AT34C0210TU18SL38
AT34C0210TU18SL38
Features
Description
The AT34C02 provides 2048 bits of serial electrically-erasable and programmable
read only memory (EEPROM) organized as 256 words of 8 bits each. The first-half of
the device incorporates a software write protection feature while hardware write pro-
tection for the entire array is available via an external pin as well. Once the software
write protection is enabled, by sending a special command to the device, it cannot be
reversed. The hardware write protection is controlled with the WP pin and can be used
to protect the entire array, whether or not the software write protection has been
enabled. This allows the user to protect none, first-half, or all of the array depending
on the application. The device is optimized for use in many industrial and commercial
applications where low-power and low-voltage operations are essential. The AT34C02
is available in space saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP, 8-lead
TSSOP and 8-ball dBGA2 packages and is accessed via a two-wire serial interface. In
addition, it is available in 1.8V (1.8V to 5.5V) versions.
Table 1. Pin Configurations
Pin Name
A0 - A2
SDA
SCL
WP
Permanent Software Write Protection for the First-half of the Array
Hardware Write Protection for the Entire Array
Low-voltage Operation
Internally Organized 256 x 8
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
100 kHz (1.8V) and 400 kHz (2.7V and 5.0V) Compatibility
16-byte Page Write Modes
Partial Page Writes Are Allowed
Self-timed Write Cycle (5 ms max)
High-reliability
Automotive Grade Devices Available
8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP, 8-lead TSSOP, and 8-ball dBGA2
Packages
Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers
– Software Procedure to Verify Write Protect Status
– 1.8 (V
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
GND
A0
A1
A2
8-lead TSSOP
1
2
3
4
CC
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
= 1.8V to 5.5V)
8
7
6
5
VCC
WP
SCL
SDA
GND
A0
A1
A2
GND
A0
A1
A2
8-lead PDIP
8-lead SOIC
1
2
3
4
1
2
3
4
8
7
6
5
8
7
6
5
VCC
WP
SCL
SDA
VCC
WP
SCL
SDA
VCC
SDA
SCL
WP
Bottom View
VCC
SDA
SCL
8-lead MAP
WP
8-ball dBGA2
8
7
6
5
Bottom View
8
7
6
5
1
2
3
4
1
2
3
4
A0
A1
A2
GND
A0
A1
A2
GND
Two-wire Serial
EEPROM
with Permanent
Software Write
Protect
2K (256 x 8)
AT34C02
Note:
Not recommended for new
design; please refer to
AT34CO2C datasheet.
Rev. 0958Q–SEEPR–1/07
1

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AT34C02-10TU-1.8 SL383 Summary of contents

Page 1

... Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers Description The AT34C02 provides 2048 bits of serial electrically-erasable and programmable read only memory (EEPROM) organized as 256 words of 8 bits each. The first-half of the device incorporates a software write protection feature while hardware write pro- tection for the entire array is available via an external pin as well ...

Page 2

... Voltage on Any Pin with Respect to Ground .................................... –1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA Figure 1. Block Diagram V CC GND WP SCL SDA AT34C02 2 *NOTICE: START STOP CONTROL LOGIC WRITE PROTECT CIRCUITRY LOAD COMP DEVICE ADDRESS COMPARATOR LOAD R/W DATA WORD ADDR/COUNTER ...

Page 3

... Pin Description Table 2. AT34C02 Write Protection Modes WP Pin Status V CC GND or Floating GND or Floating (1) Table 3. Pin Capacitance Applicable over recommended operating range from T Symbol Test Condition C Input/Output Capacitance (SDA) I/O C Input Capacitance ( Note: 1. This parameter is characterized and is not 100% tested. 0958Q–SEEPR–1/07 SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device ...

Page 4

... Output Low Level V = 3.0V OL2 CC V Output Low Level V = 1.8V OL1 CC Note min and V max are reference only and are not tested AT34C02 4 = 40°C to +85° +1.8V to +5.5V, T – Test Condition Min 1.8 2.7 READ at 100 kHz WRITE at 100 kHz V ...

Page 5

Table 5. AC Characteristics Applicable over recommended operating range from TTL Gate and 100 pF (unless otherwise noted). L Symbol Parameter f Clock Frequency, SCL SCL t Clock Pulse Width Low LOW t Clock Pulse Width ...

Page 6

... Device Operation AT34C02 6 AT34C02, 2K Serial EEPROM: The 2K is internally organized with 16 pages of 16 bytes each. Random word addressing requires a 8-bit data word address. CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an exter- nal device. Data on the SDA pin may change only during SCL low time periods (see Figure 5 on page 8) ...

Page 7

Figure 2. Bus Timing SCL: Serial Clock SDA: Serial Data I/O Figure 3. Write Cycle Timing SCL: Serial Clock SDA: Serial Data I/O SCL SDA 8th BIT WORDn Note: 1. The write cycle time t is the time from a ...

Page 8

... Figure 5. Start and Stop Condition Figure 6. Output Acknowledge AT34C02 8 0958Q–SEEPR–1/07 ...

Page 9

... The next 3 bits are the A2, A1 and A0 device address bits for the AT34C02 EEPROM. These 3 bits must compare to their corresponding hard-wired input pins. The eighth bit of the device address is the read/write operation select bit. A read opera- tion is initiated if this bit is high and a write operation is initiated if this bit is low ...

Page 10

... Write Protection AT34C02 10 The software write protection, once enabled, permanently write protects only the first- half of the array (00H - 7FH) while the hardware write protection, via the WP pin, is used to protect the entire array. SOFTWARE WRITE PROTECTION: The software write protection is enabled by send- ing a command, similar to a normal write command, to the device which programs the write protect register ...

Page 11

... This address stays valid between operations as long as the chip power is maintained. The address “roll over” during read is from the last byte of the last memory page to the first byte of the first page. ...

Page 12

... AT34C02 12 in and acknowledged by the EEPROM, the microcontroller must generate another start condition. The microcontroller now initiates a current address read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word. To end the command, the microcontroller does not respond with a zero but does generate a following stop condition (see Figure 12 on page 13) ...

Page 13

Figure 10. Page Write Figure 11. Current Address Read Figure 12. Random Read Figure 13. Sequential Read 0958Q–SEEPR–1/07 13 ...

Page 14

... AT34C02-10TU-1.8 (2) AT34C02Y1-10YU-1.8 (2) AT34C02U3-10UU-1.8 AT34C02N-10SE-2.7 AT34C02-10TE-2.7 (2) AT34C02N-10SQ-2.7 (2) AT34C02-10TQ-2.7 (3) AT34C02-W1.8-11 Notes: 1. For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC Characteristics Tables. 2. “U” and “Q” designate Green package + RoHS compliant. 3. Available in waffle pack and wafer form; order as SL788 for inkless wafer form. Bumped die available upon request. Please contact Serial EEPROM Marketing ...

Page 15

Packaging Information 8P3 – PDIP Top View PLCS Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information. 2. Dimensions A and L are measured ...

Page 16

... JEDEC SOIC Top View e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT34C02 TITLE 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing ...

Page 17

TSSOP Pin 1 indicator this corner N Top View Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, ...

Page 18

... MAP D E Top View Side View 2325 Orchard Parkway San Jose, CA 95131 R AT34C02 End View A SYMBOL TITLE 8Y1, 8-lead (4.90 x 3.00 mm Body) MSOP Array Package (MAP PIN 1 INDEX AREA Bottom View COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM MAX NOTE – ...

Page 19

E PIN 1 BALL PAD CORNER Top View PIN 1 BALL PAD CORNER 1 2 (d1 (e1) Bottom View 8 SOLDER BALLS 1. Dimension “b” is measured at the maximum solder ball diameter. ...

Page 20

... Revision History AT34C02 20 Doc. Rev. Date Comments 0958Q 1/2007 Revision history implemented. Added Note to Page 1: Not recommended for new design; please refer to AT34CO2C datasheet. 0958Q–SEEPR–1/07 ...

Page 21

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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