AT45DB021D-MH-Y Atmel, AT45DB021D-MH-Y Datasheet - Page 21

IC FLASH 2MBIT 66MHZ 8UDFN

AT45DB021D-MH-Y

Manufacturer Part Number
AT45DB021D-MH-Y
Description
IC FLASH 2MBIT 66MHZ 8UDFN
Manufacturer
Atmel
Datasheet

Specifications of AT45DB021D-MH-Y

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
2M (1024 pages x 264 bytes)
Speed
66MHz
Interface
SPI, RapidS
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-UDFN
Architecture
Sectored
Interface Type
SPI Serial
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
15 mA
Mounting Style
SMD/SMT
Organization
32 KB x 8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AT45DB021D-MH
AT45DB021D-MH
AT45DB021D-MU
AT45DB021D-MU
3638J–DFLASH–5/10
11.
11.1
12.
“Power of 2” Binary Page Size Option
“Power of 2” binary page size Configuration Register is a user-programmable nonvolatile register that allows the
page size of the main memory to be configured for binary page size (256-bytes) or the Atmel
page size (264-bytes). The “power of 2” page size is a One-time Programmable (OTP) register and once the
device is configured for “power of 2” page size, it cannot be reconfigured again. The devices are initially
shipped with the page size set to 264-bytes. The user has the option of ordering binary page size (256-bytes)
devices from the factory. For details, please refer to
For the binary “power of 2” page size to become effective, the following steps must be followed:
If the above steps are not followed to set the page size prior to page programming, incorrect data during a read
operation may be encountered.
Programming the Configuration Register
To program the Configuration Register for “power of 2” binary page size, the CS pin must first be asserted as it
would be with any other command. Once the CS pin has been asserted, the appropriate 4-byte opcode sequence
must be clocked into the device in the correct order. The 4-byte opcode sequence must start with 3DH and be
followed by 2AH, 80H, and A6H. After the last bit of the opcode sequence has been clocked in, the CS pin must be
deasserted to initiate the internally self-timed program cycle. The programming of the Configuration Register
should take place in a time of t
device must be power-cycled after the completion of the program cycle to set the “power of 2” page size. If the
device is powered-down before the completion of the program cycle, then setting the Configuration Register
cannot be guaranteed. However, the user should check bit zero of the status register to see whether the page size
was configured for binary page size. If not, the command can be re-issued again.
Table 11-1.
Figure 11-1. Erase Sector Protection Register
Manufacturer and Device ID Read
Identification information can be read from the device to enable systems to electronically query and identify the
device while it is in system. The identification method and the command opcode comply with the JEDEC standard
for “Manufacturer and Device ID Read Methodology for SPI Compatible Serial Interface Memory Devices”. The
type of information that can be read from the device includes the JEDEC defined Manufacturer ID, the vendor
specific Device ID, and the vendor specific Extended Device Information.
To read the identification information, the CS pin must first be asserted and the opcode of 9FH must be clocked
into the device. After the opcode has been clocked in, the device will begin outputting the identification data on the
SO pin during the subsequent clock cycles. The first byte that will be output will be the Manufacturer ID followed by
CS
Command
Power of Two Page Size
1. Program the one-time programmable configuration resister using opcode sequence 3DH, 2AH, 80H and
2. Power cycle the device (i.e. power down and power up again).
3. The page for the binary page size can now be programmed.
SI
A6H (please see
Each transition
represents 8 bits
Opcode
Byte 1
Programming the Configuration Register
Opcode
Section
Byte 2
11.1).
P
Opcode
Byte 3
, during which time the Status Register will indicate that the device is busy. The
Opcode
Byte 4
Byte 1
Section 21. “Ordering Information” on page
3DH
Byte 2
2AH
Byte 3
80H
Atmel AT45DB021D
Byte 4
A6H
®
DataFlash
43.
®
standard
21

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