AT26DF161A-SU Atmel, AT26DF161A-SU Datasheet - Page 24

• Manufacturer Part Number: AT26DF161A-SU
• Description: IC FLASH 16MBIT 70MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT26DF161A-SU

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 16M (8192 pages x 256 bytes)
• Speed: 70MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.1.1
10.1.2
10.1.3
10.1.4
10.1.5
24
AT26DF161A
SPRL Bit
SPM Bit
EPE Bit
WPP Bit
SWP Bits
The SPRL bit is used to control whether the Sector Protection Registers can be modified or not.
When the SPRL bit is in the logical “1” state, all Sector Protection Registers are locked and can-
not be modified with the Protect Sector and Unprotect Sector commands (the device will ignore
these commands). In addition, the Global Protect and Global Unprotect features cannot be per-
formed. Any sectors that are presently protected will remain protected, and any sectors that are
presently unprotected will remain unprotected.
When the SPRL bit is in the logical “0” state, all Sector Protection Registers are unlocked and
can be modified (the Protect Sector and Unprotect Sector commands, as well as the Global Pro-
tect and Global Unprotect features, will be processed as normal). The SPRL bit defaults to the
logical “0” state after a power-up or a device reset.
The SPRL bit can be modified freely whenever the WP pin is deasserted. However, if the WP pin
is asserted, then the SPRL bit may only be changed from a logical “0” (Sector Protection Regis-
ters are unlocked) to a logical “1” (Sector Protection Registers are locked). In order to reset the
SPRL bit back to a logical “0” using the Write Status Register command, the WP pin will have to
first be deasserted.
The SPRL bit is the only bit of the Status Register that can be user modified via the Write Status
Register command.
The SPM bit indicates whether the device is in the Byte/Page Program mode or the Sequential
Program Mode. The default state after power-up or device reset is the Byte/Page Program
mode.
The EPE bit indicates whether the last erase or program operation completed successfully or
not. If at least one byte during the erase or program operation did not erase or program properly,
then the EPE bit will be set to the logical “1” state. The EPE bit will not be set if an erase or pro-
gram operation aborts for any reason such as an attempt to erase or program a protected region
or if the WEL bit is not set prior to an erase or program operation. The EPE bit will be updated
after every erase and program operation.
The WPP bit can be read to determine if the WP pin has been asserted or not.
The SWP bits provide feedback on the software protection status for the device. There are three
possible combinations of the SWP bits that indicate whether none, some, or all of the sectors
have been protected using the Protect Sector command or the Global Protect feature. If the
SWP bits indicate that some of the sectors have been protected, then the individual Sector Pro-
tection Registers can be read with the Read Sector Protection Registers command to determine
which sectors are in fact protected.
3640D–DFLASH–8/09