AT45DB321D-SU Atmel, AT45DB321D-SU Datasheet - Page 55
![IC FLASH 32MBIT 66MHZ 8SOIC](/photos/6/50/65032/453-8-soic_sml.jpg)
AT45DB321D-SU
Manufacturer Part Number
AT45DB321D-SU
Description
IC FLASH 32MBIT 66MHZ 8SOIC
Manufacturer
Atmel
Datasheet
1.AT45DB321D-MU.pdf
(57 pages)
Specifications of AT45DB321D-SU
Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
32M (8192 pages x 528 bytes)
Speed
66MHz
Interface
SPI, RapidS
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Package
8SOIC EIAJ
Density
32 Mb
Architecture
Sectored
Block Organization
Symmetrical
Typical Operating Supply Voltage
3.3 V
Sector Size
64KByte x 64
Timing Type
Synchronous
Interface Type
Serial-SPI
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
15 mA
Mounting Style
SMD/SMT
Organization
528 B x 8192
Memory Configuration
8192 Pages X 528 Bytes
Clock Frequency
66MHz
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
SOIC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT45DB321D-SU
Manufacturer:
ATMEL
Quantity:
15 000
Company:
Part Number:
AT45DB321D-SU
Manufacturer:
ATMEL
Quantity:
1 000
Company:
Part Number:
AT45DB321D-SU
Manufacturer:
Atmel
Quantity:
7 530
Company:
Part Number:
AT45DB321D-SU
Manufacturer:
ATMEL
Quantity:
3
Part Number:
AT45DB321D-SU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT45DB321D-SU-2.5
Manufacturer:
ON
Quantity:
31 000
Part Number:
AT45DB321D-SU-SL955
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
28. Revision History
3597O–DFLASH–10/09
Revision Level – Release Date
A – November 2005
B – January 2006
C – March 2006
D – April 2006
E – July 2006
F – August 2006
G – September 2006
H – February 2007
I – August 2007
J – April 2008
K – September 2008
L – February 2009
History
Initial Release
Added 6 x 5 mm MLF (VDFN) package.
Added text, in “Programming the Configuration Register”, to indicate
that power cycling is required to switch to “power of 2” page size
after the opcode enable has been executed.
Corrected typographical error regarding the opcode for chip erase in
“Program and Erase Commands” table.
Added Preliminary.
Changed the sector size from 256K bytes to 64K bytes.
Added the “Legacy Commands” table.
Added 8 x 6 mm MLF (VDFN) package.
Changed the sector size of 0a and 0b to 8 pages and 120 pages
respectively.
Changed the Product Version Code to 00001.
Corrected typographical errors.
Added errata regarding Chip Erase.
Added AT45DB321D-SU to ordering information and corresponding
8S2 package.
Removed “not recommended for new designs” note from ordering
information for 8MW package.
Added AT45DB321D-CNU to ordering information and
corresponding 8CN3 package.
Removed “not recommended for new designs” comment from 8MW
package drawing.
Added additional text to “power of 2” binary page size option.
Changed t
Changed t
Changed t
Removed AT45DB321D-CNU from ordering information and
corresponding 8CN3 package.
Added part number ordering code details for suffixes SL954/955.
Added ordering code details.
Corrected typographical errors in Sector Erase section.
Corrected A17+A16 from x (Don’t Care) to A for opcode 7Ch in
Table 15-6.
Corrected PA8+PA7 from x (Don’t Care) to P for opcode 7Ch in
Table 15-7.
Changed t
VSCL
RDPD
XFR
DIS
(Typ and Max) to 27 ns and 35 ns, respectively.
and t
from 50 µs to 70 µs.
from 30 µs to 35 µs.
COMP
values from 400 µs to 200 µs.
AT45DB321D
55