MT28F128J3RP-12 ET Micron Technology Inc, MT28F128J3RP-12 ET Datasheet - Page 32
![IC FLASH 128MBIT 120NS 56TSOP](/photos/7/30/73003/mfg557-56-tsop_sml.jpg)
MT28F128J3RP-12 ET
Manufacturer Part Number
MT28F128J3RP-12 ET
Description
IC FLASH 128MBIT 120NS 56TSOP
Manufacturer
Micron Technology Inc
Datasheet
1.MT28F128J3FS-12_ET_TR.pdf
(55 pages)
Specifications of MT28F128J3RP-12 ET
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
128M (16Mx8, 8Mx16)
Speed
120ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
56-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
09005aef80b5a323
MT28F640J3.fm – Rev. N 3/05 EN
Figure 10: BYTE/WORD PROGRAM
FULL STATUS CHECK PROCEDURE
Read Status Register
Program Complete
Program Successful
Data (see above)
Check if Desired
Write Data and
Read Status
Byte/Word
Full Status
Byte/Word
Write 40h,
Register
Address
Address
SR3 =
SR7 =
SR1 =
SR4 =
Start
1
0
0
0
Flowchart
0
1
1
1
Voltage Range Error
Device Protect Error
Programming Error
32
BUS
OPERATION
WRITE
WRITE
READ
STANDBY
Toggling OE# (LOW to HIGH to LOW) updates the status register.
To ensure the availability of correct status, please follow the
timings shown in Figure 20 on page 50. This can be done in
place of issuing the READ STATUS REGISTER command. Repeat
for subsequent programming operations.
After each program operation or after a sequence of
programming operations, an SR full status check can be done.
Write FFh after the last program operation to place the device in
read array mode.
BUS
OPERATION
WRITE
WRITE
READ
STANDBY
Toggling OE# (LOW to HIGH to LOW) updates the status register.
This can be done in place of issuing the READ STATUS REGISTER
command. Repeat for subsequent programming operations.
SR4, SR3, and SR1 are only cleared by the Clear Status Register
command in cases where multiple locations are programmed
before full status is checked.
If an error is detected, clear the status register before
attempting retry or other error recovery.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
COMMAND
SETUP BYTE/
WORD
PROGRAM
BYTE/WORD
PROGRAM
COMMAND
SETUP BYTE/
WORD
PROGRAM
BYTE/WORD
PROGRAM
128Mb, 64Mb, 32Mb
Q-FLASH MEMORY
COMMENTS
Data = 40h
Addr = Location to be
Data = Data to be
programmed
Addr = Location to be
Status Register Data
Check SR7
1 = ISM Ready
0 = ISM Busy
COMMENTS
Check SR3
1 = Programming to
Check SR1
1 = Device Protect Detect
RP# = V
Only required for systems
implementing lock bit
configuration
Status Register Data
Check SR4
1 = Programming Error
Voltage Error Detect
programmed
programmed
Set
IH
, Block Lock Bit is
©2000 Micron Technology. Inc.