MT48H16M16LFBF-75 IT:G TR Micron Technology Inc, MT48H16M16LFBF-75 IT:G TR Datasheet - Page 32

IC SDRAM 256MBIT 132MHZ 54VFBGA

MT48H16M16LFBF-75 IT:G TR

Manufacturer Part Number
MT48H16M16LFBF-75 IT:G TR
Description
IC SDRAM 256MBIT 132MHZ 54VFBGA
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48H16M16LFBF-75 IT:G TR

Format - Memory
RAM
Memory Type
Mobile SDRAM
Memory Size
256M (16Mx16)
Speed
132MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Package / Case
54-VFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1325-2
Figure 21:
Figure 22:
PDF:09005aef8219eeeb/Source: 09005aef8219eedd
256mb_x16_sdram_y36m_1.fm - Rev G 6/09 EN
Random WRITE Cycles
WRITE-to-READ
Note:
Note:
In the case of a fixed-length burst being executed to completion, a PRECHARGE com-
mand issued at the optimum time (as described above) provides the same operation
that would result from the same fixed-length burst with auto precharge. The disadvan-
tage of the PRECHARGE command is that it requires that the command and address
buses be available at the appropriate time to issue the command; the advantage of the
PRECHARGE command is that it can be used to truncate fixed-length or continuous
page bursts.
COMMAND
COMMAND
ADDRESS
ADDRESS
Each WRITE command may be to any bank. DQM is LOW.
BL = 2. The WRITE command may be to any bank, and the READ command may be to any
bank. DQM is LOW. CL = 2 for illustration.
CLK
CLK
DQ
DQ
WRITE
BANK,
COL n
BANK,
WRITE
COL n
D
T0
n
D
IN
T0
n
IN
n + 1
NOP
WRITE
BANK,
T1
D
COL a
T1
IN
D
a
IN
BANK,
READ
COL b
BANK,
T2
WRITE
COL x
T2
D
x
32
IN
DON’T CARE
T3
NOP
WRITE
BANK,
COL m
T3
D
m
IN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
NOP
D
T4
OUT
b
256Mb: x16, x32 Mobile SDRAM
DON’T CARE
NOP
T5
b + 1
D
OUT
©2006 Micron Technology, Inc. All rights reserved.
Operations

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