M25P20-VMN6T NUMONYX, M25P20-VMN6T Datasheet - Page 21

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M25P20-VMN6T

Manufacturer Part Number
M25P20-VMN6T
Description
IC FLASH 2MBIT 50MHZ 8SOIC
Manufacturer
NUMONYX
Series
Forté™r
Datasheet

Specifications of M25P20-VMN6T

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
2M (256K x 8)
Speed
50MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-1623-2

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Bulk Erase (BE)
The Bulk Erase (BE) instruction sets all bits to 1
(FFh). Before it can be accepted, a Write Enable
(WREN) instruction must previously have been ex-
ecuted. After the Write Enable (WREN) instruction
has been decoded, the device sets the Write En-
able Latch (WEL).
The Bulk Erase (BE) instruction is entered by driv-
ing Chip Select (S) Low, followed by the instruction
code on Serial Data Input (D). Chip Select (S)
must be driven Low for the entire duration of the
sequence.
The instruction sequence is shown in
Chip Select (S) must be driven High after the
eighth bit of the instruction code has been latched
Figure 16. Bulk Erase (BE) Instruction Sequence
S
C
D
Figure
0
16..
1
2
Instruction
3
in, otherwise the Bulk Erase instruction is not exe-
cuted. As soon as Chip Select (S) is driven High,
the self-timed Bulk Erase cycle (whose duration is
t
progress, the Status Register may be read to
check the value of the Write In Progress (WIP) bit.
The Write In Progress (WIP) bit is 1 during the self-
timed Bulk Erase cycle, and is 0 when it is com-
pleted. At some unspecified time before the cycle
is completed, the Write Enable Latch (WEL) bit is
reset.
The Bulk Erase (BE) instruction is executed only if
both Block Protect (BP1, BP0) bits are 0. The Bulk
Erase (BE) instruction is ignored if one, or more,
sectors are protected.
4
BE
5
) is initiated. While the Bulk Erase cycle is in
6
7
AI03752D
M25P20
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