PSD813F1A-90M STMicroelectronics, PSD813F1A-90M Datasheet - Page 62
![IC FLASH 1MBIT 90NS 52QFP](/photos/7/25/72513/497-52-pqfp_series_sml.jpg)
PSD813F1A-90M
Manufacturer Part Number
PSD813F1A-90M
Description
IC FLASH 1MBIT 90NS 52QFP
Manufacturer
STMicroelectronics
Datasheet
1.PSD813F1A-90U.pdf
(111 pages)
Specifications of PSD813F1A-90M
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
1M (128K x 8)
Speed
90ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
52-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-1977
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PSD813F1A-90M
Manufacturer:
STMicroelectronics
Quantity:
10 000
Company:
Part Number:
PSD813F1A-90MI
Manufacturer:
STMicroelectronics
Quantity:
10 000
PSD813F1A
Port D – Functionality and Structure
Port D has three I/O pins. See Figure
ure 32., page
dress Out mode, and therefore no Control
Register is required. Port D can be configured to
perform one or more of the following functions:
■
■
■
■
Figure 31. Port D Structure
62/111
MCU I/O Mode
CPLD Output – External Chip Select (ECS0-
ECS2)
CPLD Input – direct input to the CPLD, no
Input Macrocells (IMC)
Slew rate – pins can be set up for fast slew
rate
63. This port does not support Ad-
ECS [ 2:0 ]
WR
WR
READ MUX
DATA OUT
DIR REG.
D
D
REG.
P
D
B
Q
Q
31
and
Fig-
DATA OUT
DATA IN
Port D pins can be configured in PSDsoft Express
as input pins for other dedicated functions:
■
■
■
CPLD-INPUT
PD0 – ALE, as address strobe input
PD1 – CLKIN, as clock input to the macrocells
flip-flops and APD counter
PD2 – CSI, as active Low chip select input. A
High input will disable the Flash memory,
EEPROM, SRAM and CSIOP.
OUTPUT
OUTPUT
SELECT
MUX
ENABLE PRODUCT
TERM (.OE)
PORT D PIN
AI02889