PSD813F1A-12JI STMicroelectronics, PSD813F1A-12JI Datasheet - Page 47

• Manufacturer Part Number: PSD813F1A-12JI
• Description: IC FLASH 1MBIT 120NS 52PLCC
• Manufacturer: STMicroelectronics

Specifications of PSD813F1A-12JI

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 1M (128K x 8)
• Speed: 120ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 497-1973-5

Data Byte Enable Reference
Microcontrollers have different data byte orienta-
tions. The following table shows how the PSD in-
terprets byte/word operations in different bus
WRITE configurations. Even-byte refers to loca-
tions with address A0 equal to zero and odd byte
as locations with A0 equal to one.
Table 16. Eight-Bit Data Bus
Figure 23. Interfacing the PSD with an 80C31
RESET
RESET
BHE
X
X
12
13
14
15
19
18
31
2
3
4
5
6
7
8
9
1
80C31
EA/VP
X1
X2
RESET
INT0
INT1
T0
T1
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
A0
0
1
ALE/P
PSEN
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
RXD
TXD
WR
Even Byte
Odd Byte
RD
RESET
17
16
11
10
39
38
37
36
35
34
33
32
21
22
23
24
25
26
27
28
29
30
D7-D0
RD
PSEN
A8
A9
A10
A11
A12
A13
A15
WR
ALE
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
A14
MCU Bus Interface Examples
Figure
The A16 connection to the PA0 pin allows for a
larger address input to the PSD. Configuration 4 is
shown in
connected to Cntl1 and the PSEN signal is con-
nected to the CNTL2.
80C31
Figure
CNTL1), and Write Strobe (WR, CNTL0) may be
used for accessing the internal memory and I/O
Ports. The ALE input (pin PD0) latches the ad-
dress.
nections between the PSD and some popular
MCUs. The PSD Control input pins are labeled as
to the MCU function for which they are configured.
The MCU bus interface is specified using the PSD-
soft Express Configuration.
The first configuration is 80C31-compatible, and
the bus interface to the PSD is identical to that
shown in Figure 23. The second and third configu-
rations have the same bus connection as shown in
Table 17., page
(PSEN) connected to the CNTL1 pin on the PSD.
which has an 8-bit multiplexed address/data bus.
The lower address byte is multiplexed with the
data bus. The MCU control signals Program Se-
lect Enable (PSEN, CNTL2), Read Strobe (RD,
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
23
23
to
Figure 24., page
shows the bus interface for the 80C31,
26
30
31
32
33
34
35
36
37
42
39
40
41
43
44
45
46
47
50
49
10
48
8
9
PSD
show examples of the basic con-
48. There is only one READ input
ADIO0
ADIO1
ADIO3
ADIO4
ADIO5
ADIO6
ADIO7
ADIO8
ADIO9
ADIO10
ADIO11
ADIO12
ADIO13
ADIO14
ADIO15
CNTL0 (WR)
CNTL1(RD)
CNTL2 (PSEN)
PD0-ALE
PD1
PD2
RESET
ADIO2
AD7-AD0
49. The RD signal is
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PSD813F1A
29
28
27
25
24
23
22
21
19
18
17
14
13
12
11
52
7
6
5
4
3
2
51
20
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