NAND256W4A0AN6E STMicroelectronics, NAND256W4A0AN6E Datasheet - Page 21
![IC FLASH 256MBIT 48TSOP](/photos/7/26/72669/497-48-tsop_series_sml.jpg)
NAND256W4A0AN6E
Manufacturer Part Number
NAND256W4A0AN6E
Description
IC FLASH 256MBIT 48TSOP
Manufacturer
STMicroelectronics
Datasheet
1.NAND128W3A2BN6E.pdf
(56 pages)
Specifications of NAND256W4A0AN6E
Format - Memory
FLASH
Memory Type
FLASH - Nand
Memory Size
256M (16Mx16)
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Speed
-
Other names
497-3614
Read Memory Array
Each operation to read the memory area starts
with a pointer operation as shown in the
Operations
has been selected using the Read A, Read B or
Read C commands four bus cycles (for 512Mb
and 1Gb devices) or three bus cycles (for 128Mb
and 256Mb devices) are required to input the ad-
dress (refer to
The device defaults to Read A mode after power-
up or a Reset operation. Devices, where page0 is
read automatically at power-up, are available on
request.
When reading the spare area addresses:
are used to set the start address of the spare area
while addresses:
are ignored.
Once the Read A or Read C commands have
been issued they do not need to be reissued for
subsequent read operations as the pointer re-
mains in the respective area. However, the Read
B command is effective for only one operation,
once an operation has been executed in Area B
the pointer returns automatically to Area A and so
Figure 13. Read (A,B,C) Operations
A0 to A3 (x8 devices)
A0 to A2 (x16 devices)
A4 to A7 (x8 devices)
A3 to A7 (x16 devices)
RB
I/O
CL
AL
W
R
E
section. Once the area (main or spare)
Table
Command
01h/ 50h
Code
00h/
6.) of the data to be read.
Address Input
NAND128-A, NAND256-A, NAND512-A, NAND01G-A
Pointer
tBLBH1
(read)
Busy
another Read B command is required to start an-
other read operation in Area B.
Once a read command is issued three types of op-
erations are available: Random Read, Page Read
and Sequential Row Read.
Random Read. Each time the command is is-
sued the first read is Random Read.
Page Read. After the Random Read access the
page data is transferred to the Page Buffer in a
time of
the transfer is complete the Ready/Busy signal
goes High. The data can then be read out sequen-
tially (from selected column address to last column
address) by pulsing the Read Enable signal.
Sequential Row Read. After the data in last col-
umn of the page is output, if the Read Enable sig-
nal is pulsed and Chip Enable remains Low then
the next page is automatically loaded into the
Page Buffer and the read operation continues. A
Sequential Row Read operation can only be used
to read within a block. If the block changes a new
read command must be issued.
Refer to
quential Row Read operations.
To terminate a Sequential Row Read operation set
the Chip Enable signal to High for more than t
Sequential Row Read is not available when the
Chip Enable Don't Care option is enabled.
t
WHBH
Figure 15.
Data Output (sequentially)
(refer to
and
Table 21.
Figure 16.
for value). Once
for details of Se-
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