M29W320DT90N6 NUMONYX, M29W320DT90N6 Datasheet - Page 5
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M29W320DT90N6
Manufacturer Part Number
M29W320DT90N6
Description
IC FLASH 32MBIT 90NS 48TSOP
Manufacturer
NUMONYX
Series
Axcell™r
Datasheet
1.M29W320DB70N6.pdf
(44 pages)
Specifications of M29W320DT90N6
Format - Memory
FLASH
Memory Type
FLASH - Nor
Memory Size
32M (4Mx8, 2Mx16)
Speed
90ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
SUMMARY DESCRIPTION
The M29W320D is a 32 Mbit (4Mb x8 or 2Mb x16)
non-volatile memory that can be read, erased and
reprogrammed. These operations can be per-
formed using a single low voltage (2.7 to 3.6V)
supply. On power-up the memory defaults to its
Read mode where it can be read in the same way
as a ROM or EPROM.
The memory is divided into blocks that can be
erased independently so it is possible to preserve
valid data while old data is erased. Each block can
be protected independently to prevent accidental
Program or Erase commands from modifying the
memory. Program and Erase commands are writ-
ten to the Command Interface of the memory. An
on-chip Program/Erase Controller simplifies the
process of programming or erasing the memory by
taking care of all of the special operations that are
required to update the memory contents. The end
of a program or erase operation can be detected
and any error conditions identified. The command
Figure 2. Logic Diagram
A0-A20
BYTE
RP
W
G
E
21
M29W320DT
M29W320DB
V CC
V SS
V PP /WP
15
DQ0-DQ14
DQ15A–1
RB
AI90189B
set required to control the memory is consistent
with JEDEC standards.
The blocks in the memory are asymmetrically ar-
ranged, see Figures 5 and 6 and Tables 19 and
20. The first or last 64 Kbytes have been divided
into four additional blocks. The 16 Kbyte Boot
Block can be used for small initialization code to
start the microprocessor, the two 8 Kbyte Param-
eter Blocks can be used for parameter storage and
the remaining 32 Kbyte is a small Main Block
where the application may be stored.
Chip Enable, Output Enable and Write Enable sig-
nals control the bus operation of the memory.
They allow simple connection to most micropro-
cessors, often without additional logic.
The memory is offered in TSOP48 (12 x 20mm) and
TFBGA63 (7x11mm, 0.8mm pitch) packages. The
memory is supplied with all the bits erased (set to
1).
Table 1. Signal Names
A0-A20
DQ0-DQ7
DQ8-DQ14
DQ15A–1
E
G
W
RP
RB
BYTE
V
V
V
NC
CC
SS
PP
/WP
Address Inputs
Data Inputs/Outputs
Data Inputs/Outputs
Data Input/Output or Address Input
Chip Enable
Output Enable
Write Enable
Reset/Block Temporary Unprotect
Ready/Busy Output
Byte/Word Organization Select
Supply Voltage
V
Ground
Not Connected Internally
PP
M29W320DT, M29W320DB
/Write Protect
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