TC58FVB160AFT-70 Toshiba, TC58FVB160AFT-70 Datasheet - Page 9

• Manufacturer Part Number: TC58FVB160AFT-70
• Description: IC FLASH 16MBIT 70NS 48TSOP
• Manufacturer: Toshiba

Specifications of TC58FVB160AFT-70

• Format - Memory: FLASH
• Memory Type: FLASH - Nor
• Memory Size: 16M (2M x 8 or 1M x 16)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: TC58FVB160AFT-70(YP)

Auto Chip Erase Mode
rising edge of WE in the sixth bus cycle. All memory cells are automatically preprogrammed to 0, erased and
verified as erased by the chip. The device status is indicated by the Hardware Sequence flag.
operation. If an Auto Chip Erase operation is interrupted, it cannot be completed correctly. Hence an additional
Erase operation must be performed.
be executed and the device will enter Read mode 100 µ s after the rising edge of the WE signal in the sixth bus
cycle.
Mode. The device status is indicated by the Hardware Sequence flag. Either a Reset command or a hardware
reset is required to return the device to Read Mode after a failure.
altogether, or perform a Block Erase on each block, identify the failed block, and stop using it. The host processor
must take measures to prevent subsequent use of the failed block.
Auto Block Erase / Auto Multi-Block Erase Modes
block address is latched on the falling edge of the WE signal in the sixth bus cycle. The block erase starts as
soon as the Erase Hold Time (t
are erased, the sixth Bus Write cycle is repeated with each block address and Auto Block Erase command being
input within the Erase Hold Time (this constitutes an Auto Multi-Block Erase operation). If a command other
than an Auto Block Erase command or Erase Suspend command is input during the Erase Hold Time, the device
will reset the Command Register and enter Read Mode. The Erase Hold Time restarts on each successive rising
edge of WE . Once operation starts, all memory cells in the selected block are automatically preprogrammed to 0,
erased and verified as erased by the chip. The device status is indicated by the setting of the Hardware Sequence
flag. When the Hardware Sequence flag is read, the addresses of the blocks on which auto-erase operation is
being performed must be specified.
operation. Either operation can be aborted using a Hardware Reset. If an auto-erase operation is interrupted, it
cannot be completed correctly; therefore, a further erase operation is necessary to complete the erasing.
operation is not executed and the device returns to Read Mode 100 µ s after the rising edge of the WE signal in
the last bus cycle.
device status is indicated by the Hardware Sequence flag. After a failure either a Reset command or a Hardware
Reset is required to return the device to Read Mode. If multiple blocks are selected, it will not be possible to
ascertain the block in which the failure occurred. In this case either abandon use of the device altogether, or
perform a Block Erase on each block, identify the failed block, and stop using it. The host processor must take
measures to prevent subsequent use of the failed block.
The Auto Chip Erase Mode is set using the Chip Erase command. An Auto Chip Erase operation starts on the
Command input is ignored during an Auto Chip Erase. A hardware reset can interrupt an Auto Chip Erase
Any attempt to erase a protected block is ignored. If all blocks are protected, the Auto Erase operation will not
If an Auto Chip Erase operation fails, the device will remain in the erasing state and will not return to Read
In this case it cannot be ascertained which block the failure occurred in. Either abandon use of the device
The Auto Block Erase Mode and Auto Multi-Block Erase Mode are set using the Block Erase command. The
All commands (except Erase Suspend) are ignored during an Auto Block Erase or Auto Multi-Block Erase
Any attempt to erase a protected block is ignored. If all the selected blocks are protected, the auto-erase
If an auto-erase operation fails, the device remains in Erasing state and does not return to Read Mode. The
BEH
) has elapsed after the rising edge of the WE signal. When multiple blocks
TC58FVT160/B160AFT/AXB-70,-10
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