TC58FVM7B2ATG-65 Toshiba, TC58FVM7B2ATG-65 Datasheet
TC58FVM7B2ATG-65
Specifications of TC58FVM7B2ATG-65
Related parts for TC58FVM7B2ATG-65
TC58FVM7B2ATG-65 Summary of contents
Page 1
... TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 128-MBIT (16M 8 BITS / 8M DESCRIPTION The TC58FVM7T2A/B2A is a 134217728-bit, 3.0-V read-only electrically erasable and programmable flash memory organized as 16777216 words commands for Read, Program and Erase operations to allow easy interfacing with microprocessors. The commands are based on the JEDEC standard ...
Page 2
... Function/Boot block architecture/Bank ratio T2 Page mode/Top boot block/1:3:3:1 B2 Page mode/Bottom boot block/1:3:3:1 Capacity M7 128Mbits Supply Voltage V 3V system Device type F NOR Flash memory 2 Toshiba CMOS E PROM Boot block Speed version Top 65ns Bottom Top 85ns Bottom 80 ns Package TSOPI56-P-1420-0.50 2002-10-24 2/68 ...
Page 3
PIN ASSIGNMENT (TOP VIEW) N.C 1 A22 2 A15 3 A14 4 A13 5 A12 6 A11 7 A10 A19 11 A20 RESET 14 A21 ACC 17 RY ...
Page 4
... BLOCK DIAGRAM /ACC Control Circuit WE BYTE RESET CE Command Register OE A0 A22 A-1 TC58FVM7(T/B)2AFT(65/80 Buffer Memory Cell Memory Cell Memory Cell Array Array Array Bank0 Bank1 Bank2 DQ0 DQ15 I/O Buffer Data Latch Memory Cell Array Bank3 2002-10-24 4/68 ...
Page 5
MODE SELECTION MODE CE Read / Page Read ID Read (Manufacturer Code) ID Read (Device Code) Standby Output Disable Write Block Protect 1 Verify Block Protect Temporary Block Unprotect Hardware Reset / Standby Boot Block Protect Notes ...
Page 6
COMMAND SEQUENCES BUS FIRST BUS COMMAND WRITE WRITE CYCLE SEQUENCE CYCLES Addr. REQ’D Read/Reset 1 XXXh Word 555h Read/Reset 3 Byte AAAh Word 555h ID Read 3 Byte AAAh Word 555h Auto-Program 4 Byte AAAh Word 11 555h Auto PageProgram ...
Page 7
... READ MODE ( PAGE READ ) To read data from the memory cell array, set the device to Read Mode. In Read Mode the device can perform high-speed random access and Page Read as asynchronous ROM. The device is automatically set to Read Mode immediately after power- completion of automatic operation ...
Page 8
... Write cycle of the Command cycle. To read an ID code, the bank address as well as the ID read address must be specified. The maker code is output from address BK 01. From other banks data are output from the memory cells. Inputting a Reset command releases ID Read Mode and returns the device to Read Mode. ...
Page 9
Command Write The TC58FVM7T2A/B2A uses the standard JEDEC control commands for a single-power supply E Command Write is executed by inputting the address and data into the Command Register. The command is written by inputting a pulse to WE with ...
Page 10
... The device allows programmed into memory cells which contain cannot be programmed into cells which contain 0s. If this is attempted, execution of Auto Program will fail. This is a user error, not a device error ...
Page 11
... The Auto Chip Erase Mode is set using the Chip Erase command. An Auto Chip Erase operation starts on the rising edge the sixth bus cycle. All memory cells are automatically preprogrammed to 0, erased and verified as erased by the chip. The device status is indicated by the Hardware Sequence flag. ...
Page 12
... Command Register and enter Read Mode. The Erase Hold Time restarts on each successive rising edge Once operation starts, all memory cells in the selected block are automatically preprogrammed to 0, erased and verified as erased by the chip. The device status is indicated by the setting of the Hardware Sequence flag ...
Page 13
BLOCK PROTECTION Block Protection is a function for disabling writing and erasing specific blocks. Block protection can be carried out in two ways: by supplying a high voltage (V voltage and a command sequence (see Block protection 2). (1) Block ...
Page 14
... Hidden ROM Area The TC58FVM7T2A/B2A features a 64-Kbyte hidden ROM area which is separate from the memory cells. The area consists of one block. Data Read, Write and Protect can be performed on this block. Because Protect cannot be released, once the block is protected, data in the block cannot be overwritten. ...
Page 15
... COMMON FLASH MEMORY INTERFACE (CFI) The TC58FVM7T2A/B2A conforms to the CFI specifications. To read information from the device, input the Query command followed by the address. In Word Mode DQ8~DQ15 all output 0s. To exit this mode, input the Reset command. CFI CODE TABLE ADDRESS A6~A0 ...
Page 16
ADDRESS A6~A0 DATA DQ15~DQ0 2Ch 0002h 2Dh 0007h 2Eh 0000h 2Fh 0020h 30h 0000h 31h 00FEh 32h 0000h 33h 0000h 34h 0001h 40h 0050h 41h 0052h 42h 0049h 43h 0031h 44h 0031h 45h 0000h 46h 0002h 47h 0001h 48h 0001h ...
Page 17
ADDRESS A6~A0 DATA DQ15~DQ0 57h 0004h 58h 00XXh 59h 00XXh 5Ah 00XXh 5Bh 00XXh TC58FVM7(T/B)2AFT(65/80) DESCRIPTION Bank Organization 00h : Data at 4Ah is zero X: Number of Banks Bank0 Region information X = Number of blocs Bank0 TOP:20h BOTTOM:27h ...
Page 18
HARDWARE SEQUENCE FLAGS The TC58FVM7T2A/B2A has a Hardware Sequence flag which allows the device status to be determined during an auto mode operation. The output data is read out using the same timing as that used when CE Read Mode. ...
Page 19
... The Toggle bit begins toggling on the rising edge the last bus cycle. DQ6 alternately outputs for each OE access while CE has been completed, toggling stops and valid memory cell data can be read by subsequent reading. If the operation fails, the DQ6 output toggles. ...
Page 20
... Then, even if a proper command is input, the device may not operate. To avoid this possibility, clear the Command Register before command input environment prone to system noise, Toshiba recommend input of a software or hardware reset before command input. ...
Page 21
ABSOLUTE MAXIMUM RATINGS SYMBOL V V Supply Voltage Input Voltage IN V Input/Output Voltage DQ V Maximum Input Voltage for A9, OE and RESET IDH V Maximum Input Voltage for ACCH P Power Dissipation D T Soldering ...
Page 22
DC CHARACTERISTICS SYMBOL PARAMETER I Input Leakage Current LI I Output Leakage Current LO V Output High Voltage OH V Output Low Voltage OL V Average Random Read DD I DDO1 Current I V Average Program Current V DDO2 DD ...
Page 23
... OE to Output Low-Z OEE t Output Data Hold Time Output High-Z DF1 Output High-Z DF2 TC58FVM7(T/B)2AFT(65/80) TC58FVM7T2ATG65 , TC58FVM7B2ATG65 VDD=2.7-3.6V VDD=2.3-3. 100 Min Max Min Max Min Max TC58FVM7T2ATG80 , TC58FVM7B2ATG80 VDD=2.7-3.6V VDD=2.3-3. 100 Min Max Min Max Min Max 100 pF Unit Min Max ...
Page 24
BLOCK PROTECT SYMBOL t V Transition Time VPT Set-up Time VPS Set-up Time CESP t OE Hold Time VPH t WE Low-Level Hold Time PPLH PROGRAM AND ERASE CHARACTERISTICS SYMBOL Auto-Program Time (Byte Mode) ...
Page 25
COMMAND WRITE/PROGRAM/ERASE CYCLE SYMBOL t Command Write Cycle Time CMD Address Set-up Time / BYTE Set-up Time tAS t Address Hold Time / BYTE Hold Time AH t Address Hold Time from WE High level AHW t Data Set-up Time ...
Page 26
TIMING DIAGRAMS Read / ID Read Operation Address AHW t WE OEH D OUT ID Read Operation (apply OUT ...
Page 27
Page Read Operation Address(A3-22))) Address(0- OUT Hi-Z Read after command input ( Only Hidden Rom / CFI Read) Last command address Address Command data D OUT t t PRC RC t ACC t ...
Page 28
Command Write Operation This is the timing of the Command Write Operation. The timing which is described in the following pages is essentially the same as the timing shown on this page. WE Control Address ...
Page 29
ID Read Operation (input command sequence) Address 555h t CMD OES WE D AAh IN D OUT Read Mode (input of ID Read command sequence) (Continued) 555h Address t CMD AAh IN D ...
Page 30
Auto-Program Operation ( WE 555h Address t CMD OES WE D AAh IN D OUT t VDS V DD Note: Word Mode address shown. PA: Program address PD: Program data TC58FVM7(T/B)2AFT(65/80) Control) 2AAh 555h PA 55h A0h ...
Page 31
Auto Page Program Operation ( Address(A3-22) 555h 2AAh Address(A0- OES WE AAh 55h OUT t VDS V DD Note: Word Mode address shown. PA: Program address PD: Program Data WE Control CMD ...
Page 32
Auto Chip Erase / Auto Block Erase Operation ( 555h Address t CMD OES WE D AAh IN t VDS V DD Note: Word Mode address shown. BA: Block address for Auto Block Erase operation Auto-Program Operation ...
Page 33
Auto Page Program Operation ( Address(A3-22) 555h 2AAh Address(A0- OES WE AAh 55h OUT t VDS V DD Note: Word Mode address shown. PA: Program address PD: Program data Control CMD ...
Page 34
Auto Chip Erase / Auto Block Erase Operation ( Address 555h t CMD OES WE D AAh IN t VDS V DD Note: Word Mode address shown. BA: Block address for Auto Block Erase operation TC58FVM7(T/B)2AFT(65/80) Control) ...
Page 35
Program/Erase Suspend Operation Address B0h IN D Hi-Z OUT Program/Erase Mode RA: Read address Program/Erase Resume Operation Address OES WE t DF1 t DF2 ...
Page 36
during Auto Program/Erase Operation Hardware Reset Operation WE RESET Read after RESET Address RESET D OUT TC58FVM7(T/B)2AFT(65/80) Command input sequence READY ...
Page 37
BYTE during Read Operation CE t CEBTS OE BYTE DQ0~DQ7 DQ8~DQ14 DQ15/A-1 BYTE during Write Operation CE WE BYTE TC58FVM7(T/B)2AFT(65/80) t BTD Data Output Data Output Data Output t ACC Data Output Address Input 2002-10-24 37/68 ...
Page 38
DATA Hardware Sequence Flag ( Last Address Command Address t CMD Last D Command IN Data DQ7 DQ0~DQ6 t BUSY PA: Program address BA: Block address Hardware Sequence Flag (Toggle bit) Address t CE ...
Page 39
Block Protect 1 Operation Address VPT VPS WE t CESP CE D OUT BA: Block address *: 01h indicates that block is protected. TC58FVM7(T/B)2AFT(65/80) Block ...
Page 40
Block Protect 2 Operation Address t CMD VPS RESET D 60h IN D OUT BA: Block address BA 1: Address of next block *: 01h indicates that block is ...
Page 41
FLOWCHARTS Auto-Program Address Address 1 Note: The above command sequence takes place in Word Mode. TC58FVM7(T/B)2AFT(65/80) Start Auto-Program Command Sequence (see below) DATA Polling or Toggle Bit No Last Address? Yes Auto-Program Completed Auto-Program Command Sequence (address/data) 555h/AAh 2AAh/55h 555h/A0h ...
Page 42
Auto-Page Program Address Address 1 Program address (A2=0,A1=0,A0=0) / Program data Program address (A2=0,A1=0,A0=1) / Program data Program address (A2=0,A1=1,A0=0) / Program data Program address (A2=0,A1=1,A0=1) / Program data START Auto page program command sequence (see below ) DATA Polling ...
Page 43
Fast Program Address Address 1 Fast Program Set Command Sequence (address/data) 555h/AAh 2AAh/55h 555h/20h TC58FVM7(T/B)2AFT(65/80) Start Fast Program Set Command Sequence (see below) Fast Program Command Sequence (see below) DATA Polling or Toggle Bit No Last Address? Yes Program Sequence ...
Page 44
Auto Erase Auto Chip Erase Command Sequence (address/data) 555h/AAh 2AAh/55h 555h/80h 555h/AAh 2AAh/55h 555h/10h Note: The above command sequence takes place in Word Mode. TC58FVM7(T/B)2AFT(65/80) Start Auto Erase Command Sequence (see below) DATA Polling or Toggle Bit Auto Erase Completed ...
Page 45
DQ7 DATA Polling Start Read Byte (DQ0~DQ7) Addr. DQ7 Data? No DQ5 Read Byte (DQ0~DQ7) Addr. DQ7 Data? Fail DQ6 Toggle Bit Start Read Byte (DQ0~DQ7) Addr. DQ6 Toggle? No DQ5 Read Byte (DQ0~DQ7) Addr. DQ6 Toggle? Fail VA: Byte ...
Page 46
Block Protect 1 PLSCNT Set up Block Address Addr. Wait for Wait for 4 s Wait for 100 s Wait for 4 s Wait for 4 s Verify Block Protect Data Yes Protect Another Block? Remove ...
Page 47
Block Protect 2 RESET Wait for 4 s PLSCNT Block Protect 2 Command First Bus Write Cycle Set up Address Addr. Block Protect 2 Command Second Bus Write Cycle Wait for 100 s Block Protect 2 Command Third Bus Write ...
Page 48
BLOCK ADDRESS TABLES (1) TC58FVM7T2A (top boot block) BANK BLOCK BANK ADDRESS # # A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA0 L L BA1 L L BA2 L L BA3 L L BA4 L L ...
Page 49
BANK BLOCK BANK ADDRESS # # A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA32 BA33 BA34 BA35 BA36 BA37 L L ...
Page 50
BANK BLOCK BANK ADDRESS # # A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA64 BA65 BA66 BA67 BA68 BA69 L H ...
Page 51
BANK BLOCK BANK ADDRESS # # A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA96 BA97 BA98 BA99 BA100 BA101 L H ...
Page 52
BANK BLOCK BANK ADDRESS # # A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA128 BA129 BA130 BA131 BA132 BA133 H L ...
Page 53
BANK BLOCK BANK ADDRESS # # A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA160 BA161 BA162 BA163 BA164 BA165 H L ...
Page 54
BANK BLOCK BANK ADDRESS # # A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA192 BA193 BA194 BA195 BA196 BA197 H H ...
Page 55
BANK BLOCK BANK ADDRESS # # A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA224 BA225 BA226 BA227 BA228 BA229 H H ...
Page 56
BANK BLOCK BANK ADDRESS # # A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA255 BA256 BA257 BA258 BK3 BA259 BA260 H ...
Page 57
BANK BLOCK BANK ADDRESS # # A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA8 BA9 BA10 BA11 BA12 BA13 L L ...
Page 58
BANK BLOCK BANK ADDRESS # # A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA39 BA40 BA41 BA42 BA43 BA44 L L ...
Page 59
BANK BLOCK BANK ADDRESS # # A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA71 BA72 BA73 BA74 BA75 BA76 L H ...
Page 60
BANK BLOCK BANK ADDRESS # # A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA103 BA104 BA105 BA106 BA107 BA108 L H ...
Page 61
BANK BLOCK BANK ADDRESS # # A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA135 BA136 BA137 BA138 BA139 BA140 H L ...
Page 62
BANK BLOCK BANK ADDRESS # # A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA167 BA168 BA169 BA170 BA171 BA172 H L ...
Page 63
BANK BLOCK BANK ADDRESS # # A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA199 BA200 BA201 BA202 BA203 BA204 H H ...
Page 64
BANK BLOCK BANK ADDRESS # # A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA231 BA232 BA233 BA234 BA235 BA236 H H ...
Page 65
BLOCK SIZE TABLE (3) TC58FVM7T2A (top boot block) BLOCK SIZE BLOCK # BYTE MODE BA0~BA31 64 Kbytes BA32~BA127 64 Kbytes BA128~BA223 64 Kbytes BA224~BA254 64 Kbytes BA255~BA262 8 Kbytes (4) TC58FVM7B2A (bottom boot block) BLOCK SIZE BLOCK # BYTE MODE ...
Page 66
PACKAGE DIMENSION TSOPI56-P-1420-0.50A 1 28 18.4 0.1 20.0 0.2 TC58FVM7(T/B)2AFT(65/80) Unit : 1.0 0.1 0.1 0.05 1.2max 0.5 0.1 2002-10-24 66/68 ...
Page 67
Revision History Date Version 2002-3-14 1.00 Original version 2002-5-14 1.01 Top Boot Address (refine). (54page) 2002-5-29 1.02 Added speed version. Changed t 2002-6-11 1.03 Added a timing diagram of read after CFI/HROM command input. (26page) Erase Hold Time. (23page) Pin ...
Page 68
... TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property ...