TC58FVM6B5BTG65 Toshiba, TC58FVM6B5BTG65 Datasheet - Page 15

• Manufacturer Part Number: TC58FVM6B5BTG65
• Description: IC FLASH 64MBIT 65NS 48TSOP
• Manufacturer: Toshiba

Specifications of TC58FVM6B5BTG65

• Format - Memory: FLASH
• Memory Type: FLASH - Nor
• Memory Size: 64M (8Mx8, 4Mx16)
• Speed: 65ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: TC58FVM6B5BTG65GCH; TC58FVMGB5BTG65GCH

(4) Block Protection 3 Persistent Protection Bit(PPB) [Software Protection]
10.18. Block Protection
(1) Write Protect (
(2) Block protection 1
(3) Block protection 2
(5) Block Protection 4
Protection features several level of Block Protection.
BA133 and BA134 with
released with
to V
Now when a pulse is input to WE for t
protection can be verified using the Verify Block Protect command. Inputting V
01h is output if the block is protected and 00h is output if the block is unprotected. If block protection was unsuccessful,
the operation must be repeated. Releasing V
performing this protection command.
command sequence is the Set-up command. In the second cycle, the Block Protect command is input, in which a block
address and A1 = V
of t
Verify Block Protect command is input. This command verifies the write to the block protection circuit. Read is
performed in the fourth cycle. If the protection operation is complete, 01h is output. If a value other than 01h is output,
block protection is not complete and the Block Protect command must be input again. Removing the V
performing this protection command.
The PPBs retains the state across power cycle. Each PPB can be individually modifiable through the PPB Set command.
All PPB can be cleared by the PPB Clear Command at a time. The PPB Verify command to the device can check the PPB
status.
Hidden ROM Exit command.
After power-up or hardware reset cycle, all DPB are settled to “0” as clear. Each DPB can be individually modifiable
through the DPB Set command and DPP Clear command.
finish the DPB Set, device will be outputting ‘1’ on DQ0 at the fourth bus write cycle in the DPB verify. When Device is
outputting ‘0’ on DQ0, the DPB Set is not complete, then the hosts must retry from the DPB set command. Similarly,
when completely finish the DPB Clear, the device will be outputting ‘0’ on DQ0 at the fourth bus write cycle in the DPB
verify. When the device is outputting ‘1’ on DQ0, the DPB Clear is not complete, then the user must retry from the DPB
clear command. At the time of the finishing DPB Set, DPB Clear, and DPB Verify, the hosts have to inputting the Hidden
ROM Exit command.
outputs ‘1’ on DQ0 at the sixth bus write cycle. When device outputs ‘0’ on DQ0, the PPB Set is not complete, then the
hosts must retry from fourth bus write cycle. Similarly, when completely finish the PPB Clear, the device outputs ‘0’ on
DQ0 at the sixth bus write cycle. When the device outputs ‘1’ on DQ1, the PPB Clear is not complete, then the hosts must
retry from fourth bus write cycle.
Lock Verify command can check the PPB Lock status on the DQ1 (‘1’ is Set state and ‘0’ is Clear state). Behaviors of PPB
Lock differ between password protection mode and non-password protection mode.
RESET , exits this mode.
TC58FVM6(T/B)5B has Block Protection that is a function for disabling writing and erasing specific blocks. Block
The TC58FVM6(T/B)5B has Hardware Block protection feature by
Specify a device block address and make the following signal settings A9= OE =V
When the device state is Password Protection Mode, the hosts have to execute the Password Unlock command before
Inputting the Block Protect 2 command with RESET =V
When the device state is Password Protection Mode, the hosts have to execute the Password Unlock command before
This feature is the block protection without V
The 5th and 6th write bus cycle of the PPB Set are PPB Verify cycle. When completely finish the PPB Set, the device
When PPB is locked by the PPB Lock Set command, PPB is disabled for PPB Set and PPB Clear Operation. The PPB
At the time of the finishing PPB Set, PPB Clear, PPB Lock Set and PPB Lock Verify, the hosts have to inputting the
At the time of shipment, the PPBs and PPB Lock are settled to “0”.
This feature is the block protection without V
The Writing of the DPB Verify command to the device can check the Set or Clear of the DPB status. When completely
PPLH
IH
or V
until this write is completed; however, no intervention is necessary during this time. In the third cycle the
IL
.
WP
WP
/ACC
/ACC
IH
Dynamic Protection Bit (DPB) [Software Protection]
Persistent Protection Bit (PPB) [V
Persistent Protection Bit (PPB) [V
and A0 = A6 = V
pin) [Hardware Protection]
=V
WP
IH
.
/ACC
When the device is programming operation or erasing operation,
=V
IL
IL
.
are input. Now the device writes to the block protection circuit. There is a wait
TC58FVM6B5B protects BA0 and BA1 with
PPLH
ID
from A9 and OE terminates this mode.
ID
ID
, the device will start to write to the block protection circuit. Block
. By using Persistent Protection Bit, protection can be set to each block.
. By using Dynamic Protection Bit, protection can be set to each block.
ID
ID
Protection]
Protection]
ID
also performs block protection. The first cycle of the
TC58FVM6(T/B)5B(TG/XG)65
WP
/ACC
IL
on OE sets the device to Verify Mode.
ID
=V
, A1 = V
IL
. The TC58FVM6T5B protects
WP
IH
/ACC
and CE = A0 = A6 = V
WP
2006-05-10 15/80
=V
/ACC
IL
. This mode is
ID
pin has to fix
input from
IL
.