MD4832-D512-V3Q18-X-P/Y SanDisk, MD4832-D512-V3Q18-X-P/Y Datasheet - Page 60
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MD4832-D512-V3Q18-X-P/Y
Manufacturer Part Number
MD4832-D512-V3Q18-X-P/Y
Description
IC MDOC G3 512MB 85-FBGA
Manufacturer
SanDisk
Datasheet
1.MD4331-D1G-V3Q18-X-PY.pdf
(97 pages)
Specifications of MD4832-D512-V3Q18-X-P/Y
Format - Memory
FLASH
Memory Type
FLASH - Nand
Memory Size
512M (64M x 8)
Speed
55ns
Interface
Parallel
Voltage - Supply
2.5 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
585-1139
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MD4832-D512-V3Q18-X-P/Y
Manufacturer:
SanDisk
Quantity:
10 000
7.11 Interrupt Control Register
Description:
Address (hex): 1010
57
Read/Write
Description
Reset Value
Read/Write
Description
Reset Value
Bit No.
13-8
5-0
7-6
ENABLE. For each bit in this field:
1: Enables the respective bit in the STATUS field of the Interrupt Status register to latch
0: Holds the respective bit in the STATUS field in the cleared state. To clear a pending
Reserved for future use.
MASK. For each bit in this field:
1: Enables the respective bit in the STATUS field of the Interrupt Status register to generate
0: Prevents the respective STATUS bit from generating an interrupt.
This 16-bit register controls how interrupts are generated by Mobile DiskOnChip
G3, and indicates which of the following five sources has asserted an interrupt:
0: Flash array is ready
1: Data protection violation
2: Reading or writing more flash data than was specified in the DCNT field of the
3: BCH ECC error detected (this feature is provided to support multi-page DMA
4: Real-time clock
5: Completion of a DMA operation
GMASK
activity and cause an interrupt if the corresponding MASK bit is set.
interrupt and re-enable further interrupts on that channel, the respective ENABLE bit
must be cleared and then set.
an interrupt by asserting the IRQ# output.
Bit 15
Bit 7
ECC Control register[0]
transfers)
0
0
RFU_0
R
EDGE
Bit 14
Bit 6
0
0
Preliminary Data Sheet, Rev. 1.1
Bit 13
Bit 5
0
0
Bit 12
Bit 4
Description
0
0
R/W
Bit 11
Bit 3
0
0
ENABLE
MASK
R/W
Bit 10
Bit 2
0
0
Bit 1
Bit 9
Mobile DiskOnChip G3
0
0
91-SR-011-05-8L
Bit 0
Bit 8
0
0