SDED5-004G-NCY SanDisk, SDED5-004G-NCY Datasheet - Page 9
SDED5-004G-NCY
Manufacturer Part Number
SDED5-004G-NCY
Description
IC MDOC H3 4GB FBGA
Manufacturer
SanDisk
Type
Flash Disk Moduler
Specifications of SDED5-004G-NCY
Format - Memory
FLASH
Memory Type
FLASH - Nand
Memory Size
32G (4G x 8)
Interface
Parallel
Voltage - Supply
1.65 V ~ 1.95 V
Operating Temperature
-25°C ~ 85°C
Package / Case
115-FBGA
Density
4GByte
Operating Supply Voltage (typ)
1.8/3.3V
Operating Temperature (min)
-25C
Operating Temperature (max)
85C
Package Type
FBGA
Mounting
Surface Mount
Pin Count
115
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
1.65/2.7V
Operating Supply Voltage (max)
1.95/3.6V
Programmable
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Speed
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SDED5-004G-NCY
Manufacturer:
MICRONE
Quantity:
21 000
Rev. 1.2
6. Embedded TrueFFS Technology............................................................................................34
7. mDOC H3 Registers ................................................................................................................40
8. Booting from mDOC H3 ..........................................................................................................47
9. Design Considerations ...........................................................................................................49
9
6.1 General Description ..........................................................................................................34
6.2 Operating System Support ...............................................................................................34
6.3 DOC Driver Software Development Kit (SDK)..................................................................35
6.4 128KB Memory Window ...................................................................................................37
6.5 8KB Memory Window .......................................................................................................39
7.1 Definition of Terms............................................................................................................40
7.2 Reset Values ....................................................................................................................40
7.3 Registers Description........................................................................................................41
8.1 Introduction .......................................................................................................................47
9.1 General Guidelines ...........................................................................................................49
9.2 Configuration ....................................................................................................................49
9.3 Demux (Standard) Interface .............................................................................................49
9.4 Multiplexed Interface.........................................................................................................50
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.3.6
7.3.7
7.3.8
7.3.9
7.3.10
7.3.11
7.3.12
8.1.1
8.1.2
File Management ................................................................................................................35
Bad-Block Management......................................................................................................35
Wear-Leveling .....................................................................................................................35
Power Failure Management ................................................................................................36
Error Detection/Correction ..................................................................................................36
Special Features through I/O Control (IOCTL) Mechanism................................................36
Compatibility........................................................................................................................37
Paged RAM Command Register.........................................................................................41
Paged RAM Select Register ...............................................................................................41
Paged RAM Unique ID Download Register ........................................................................42
Chip Identification (ID) Register [0:1] ..................................................................................42
Burst Mode Control Registers (Read & Write) ....................................................................42
Burst Write Mode Exit Register ...........................................................................................43
DPD Wakeup Trigger Register............................................................................................43
DPD Activation Register......................................................................................................44
DMA Control Register .........................................................................................................44
DMA Negation Register ......................................................................................................45
Software Lock Register .......................................................................................................45
Endian Control Register ......................................................................................................46
Asynchronous Boot Mode ...................................................................................................48
Paged RAM Boot ................................................................................................................48
mDOC H3 EFD Featuring Embedded TrueFFS Data Sheet
92-DS-1205-10