SDIN2C2-2G-T SanDisk, SDIN2C2-2G-T Datasheet - Page 24

IC INAND FLASH 2GB 169FBGA

SDIN2C2-2G-T

Manufacturer Part Number
SDIN2C2-2G-T
Description
IC INAND FLASH 2GB 169FBGA
Manufacturer
SanDisk
Type
Flash Diskr
Datasheets

Specifications of SDIN2C2-2G-T

Format - Memory
FLASH
Memory Type
FLASH - Nand
Memory Size
16G (2G x 8)
Speed
50MHz
Interface
SD/SPI Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-25°C ~ 85°C
Package / Case
169-FBGA
Density
2GByte
Operating Supply Voltage (typ)
3.3V
Operating Temperature (min)
-25C
Operating Temperature (max)
85C
Package Type
TFBGA
Mounting
Surface Mount
Pin Count
169
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Programmable
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SDIN2C2-2G-T
Manufacturer:
SanDisk
Quantity:
10 000
Rev. 1.2
5.
5.1. SanDisk iNAND Power Domains
SanDisk iNAND has three power domains assigned to VDDH, VDDF, and CREG as shown in Table 14.
5.2. Capacitor Connection Guidelines
5.2.1. CREG Connections
The CREG (K2) ball must only be connected to an external capacitor that is connected to VSS. This signal may not
be left floating. The capacitor’s specifications and its placement instructions are detailed below.
The capacitor is part of an internal voltage regulator that provides power to the controller.
Caution: Failure to follow the guidelines below or connecting the CREG ball to any external signal or power
supply may cause the device to malfunction.
The trace requirements from the CREG (K2) ball to the capacitor are as follows:
The capacitor requirements are as follows:
Currently both power domains can be connected to the same 3.3V (nom) power supply. However, in order to
provide maximum flexibility and support low power operation in future iNAND devices, the PCB should be
designed as follows:
© 2007 SanDisk Corporation
3
VDDH rises OR VDDF and VDDH must rise together.
Fully supported in MP devices, starting Q4 2007; in ES samples one of the following conditions must be applied: VDDF must be stable before
A
Resistance: <2 ohm
Inductance: <5 nH
Capacitance: >=2.2 uF
Voltage Rating: >=6.3 V
Dielectric: X7R or X5R
All VDDF balls should be connected to a 3.3V supply
All VDDH balls should have the option of being connected either to a 3.3V or 1.8V supply
PPENDIX
VDDH
CREG
VDDF
Pin
3
- P
OWER
Power Domain
Host Interface
Memory
Internal
D
Table 14 - Power Domains
ELIVERY AND
24
Supported voltage ranges:
Supported voltage range:
CREG is the internal regulator connection to an
external decoupling capacitor.
Appendix - Power Delivery and Capacitor Specifications
High Voltage Region: 3.3V (nominal)
High Voltage Region: 3.3V (nominal)
C
Low Voltage Region: 1.8V (nominal)
APACITOR
Comments
S
PECIFICATIONS
SanDisk iNAND Data Sheet
80-36-00592

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